Vishwanath BS vishwanath.bs@ti.com writes:
There is no need to keep omap3 sleep code in SRAM. This code can be run very well on DDR.
/me remains skeptical
This would help us to instrument CPUIdle latencies.
Indeed, but...
I'm afraid we will need a much more descriptive changelog here, describing in detail why this will still work, and what about the previous motiviations for running SRAM has changed such that this will work out of SRAM.
Tested on ZOOM3.
Tested in what way? This path is used for both idle and suspend, and needs to be validated for retention and off mode.
Kevin
Signed-off-by: Vishwanath BS vishwanath.bs@ti.com Cc: Kevin Hillman khilman@deeprootsystems.com Cc: <Linaro> linaro-dev@lists.linaro.org
arch/arm/mach-omap2/pm34xx.c | 9 +-------- 1 files changed, 1 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 85ef245..ed9d12c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -79,8 +79,6 @@ struct power_state { static LIST_HEAD(pwrst_list); -static void (*_omap_sram_idle)(u32 *addr, int save_state);
static int (*_omap_save_secure_sram)(u32 *addr); static struct powerdomain *mpu_pwrdm, *neon_pwrdm; @@ -360,9 +358,6 @@ void omap_sram_idle(void) int core_prev_state, per_prev_state; u32 sdrc_pwr = 0;
- if (!_omap_sram_idle)
return;- pwrdm_clear_all_prev_pwrst(mpu_pwrdm); pwrdm_clear_all_prev_pwrst(neon_pwrdm); pwrdm_clear_all_prev_pwrst(core_pwrdm);
@@ -438,7 +433,7 @@ void omap_sram_idle(void) * get saved. The restore path then reads from this * location and restores them back. */
- _omap_sram_idle(omap3_arm_context, save_state);
- omap34xx_cpu_suspend(omap3_arm_context, save_state); cpu_init();
if (is_suspending()) @@ -995,8 +990,6 @@ static int __init clkdms_setup(struct clockdomain *clkdm, void *unused) void omap_push_sram_idle(void) {
- _omap_sram_idle = omap_sram_push(omap34xx_cpu_suspend,
omap34xx_cpu_suspend_sz);