On Thu, 2013-01-10 at 12:10 +0000, Punit Agrawal wrote:
This patch fixes incorrect range check for the number of PMU counters. This
caused the number of counters to be off-by-1.
Hi Tixy,
I discovered an embarassing range check issue in the CCI driver. It would allow
only 3 of the 4 CCI PMU counters to be used. This patch fixes the issue.
Oops :-) I've added this to our ARM Landing Team tree.
Thanks
-- 
Tixy
>  drivers/misc/arm-cci.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/misc/arm-cci.c b/drivers/misc/arm-cci.c
> index 291413e..de50846 100644
> --- a/drivers/misc/arm-cci.c
> +++ b/drivers/misc/arm-cci.c
> @@ -171,7 +171,7 @@ static int cci_pmu_get_event_idx(struct pmu_hw_events *hw, struct perf_event *ev
>                  return CCI400_PMU_CYCLE_COUNTER_IDX;
>          }
>  
> -	for (idx = CCI400_PMU_COUNTER0_IDX; idx < CCI400_PMU_COUNTER_LAST(cci_pmu); ++idx) {
> +	for (idx = CCI400_PMU_COUNTER0_IDX; idx <= CCI400_PMU_COUNTER_LAST(cci_pmu); ++idx) {
>  		if (!test_and_set_bit(idx, hw->used_mask))
>  			return idx;
>  	}
> @@ -239,7 +239,7 @@ static irqreturn_t cci_pmu_handle_irq(int irq_num, void *dev)
>  	/* Iterate over counters and update the corresponding perf events.
>  	   This should work regardless of whether we have per-counter overflow
>  	   interrupt or a combined overflow interrupt. */
> -	for (idx = CCI400_PMU_CYCLE_COUNTER_IDX; idx < CCI400_PMU_COUNTER_LAST(cci_pmu); idx++) {
> +	for (idx = CCI400_PMU_CYCLE_COUNTER_IDX; idx <= CCI400_PMU_COUNTER_LAST(cci_pmu); idx++) {
>  		struct perf_event *event = events->events[idx];
>  		struct hw_perf_event *hw_counter;
>