Re-enable the PL310 double linefill feature on 4460, disabled in 285d2c4, without setting the "reserved" bit 25 of the prefetch control register. Benchmarking shows no measurable difference with and without this bit set.
Signed-off-by: Mans Rullgard mans.rullgard@linaro.org --- arch/arm/mach-omap2/omap4-common.c | 10 ++++------ 1 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index e0120d5..03b13e3 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -175,16 +175,14 @@ static int __init omap_l2_cache_init(void)
/* Setup POR Control register */ por_ctrl = readl_relaxed(l2cache_base + L2X0_PREFETCH_CTRL); -#if 0 + /* * Double linefill is available only on OMAP4460 L2X0. - * Undocumented bit 25 is set for better performance. */ if (cpu_is_omap446x()) - por_ctrl |= ((1 << L2X0_PREFETCH_DATA_PREFETCH_SHIFT) | - (1 << L2X0_PREFETCH_DOUBLE_LINEFILL_SHIFT) | - (1 << 25)); -#endif + por_ctrl |= (1 << L2X0_PREFETCH_DATA_PREFETCH_SHIFT) | + (1 << L2X0_PREFETCH_DOUBLE_LINEFILL_SHIFT); + if (cpu_is_omap446x() || (omap_rev() >= OMAP4430_REV_ES2_2)) { por_ctrl |= L2X0_POR_OFFSET_VALUE; omap_smc1(0x113, por_ctrl);