On Mon, May 14, 2012 at 10:18:17PM +0100, Ilyes Gouta wrote:
I've previously read (probably on Phoronix) that Linaro is working out a 'standard' kernel interface for 2D blitters IPs as commonly found on SoCs.
Has it ever been the case? If yes, are there any documentation/references online?
I wonder if you are talking about dma-buf and the other collection of work around Unified Memory Management:
https://wiki.linaro.org/OfficeofCTO/MemoryManagement
It's not really specific for 2D blitter IPs, but it does define how memory can be allocated and shared between different devices, particularly between the CPU, display controller and GPU IP.