This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture.
Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1.
Daniel Lezcano (17): ARM: OMAP4: cpuidle - Remove unused valid field ARM: OMAP4: cpuidle - Declare the states with the driver declaration ARM: OMAP4: cpuidle - Remove the cpuidle_params_table table ARM: OMAP4: cpuidle - fix static omap4_idle_data declaration ARM: OMAP4: cpuidle - Initialize omap4_idle_data at compile time ARM: OMAP4: cpuidle - use the omap4_idle_data variable directly ARM: OMAP4: cpuidle - remove omap4_idle_data initialization at boot time ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table ARM: OMAP3: define cpuidle statically ARM: OMAP3: cpuidle - remove the 'valid' field ARM: OMAP3: cpuidle - remove cpuidle_params_table ARM: OMAP3: define statically the omap3_idle_data ARM: OMAP3: cpuidle - use omap3_idle_data directly ARM: OMAP3 : cpuidle - simplify next_valid_state ARM: OMAP3: set omap3_idle_data as static ARM: OMAP3/4: consolidate cpuidle Makefile ARM: OMAP3: cpuidle - set global variables static
arch/arm/mach-omap2/Makefile | 11 +- arch/arm/mach-omap2/board-rx51.c | 38 +++--- arch/arm/mach-omap2/cpuidle34xx.c | 299 +++++++++++++++---------------------- arch/arm/mach-omap2/cpuidle44xx.c | 135 +++++++---------- arch/arm/mach-omap2/pm.h | 38 ++--- 5 files changed, 219 insertions(+), 302 deletions(-)
The 'valid' field is never used in the code, let's remove it.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 9 +++------ 1 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index f386cbe..ee0bc50 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -29,16 +29,15 @@ struct omap4_idle_statedata { u32 cpu_state; u32 mpu_logic_state; u32 mpu_state; - u8 valid; };
static struct cpuidle_params cpuidle_params_table[] = { /* C1 - CPU0 ON + CPU1 ON + MPU ON */ - {.exit_latency = 2 + 2 , .target_residency = 5, .valid = 1}, + {.exit_latency = 2 + 2 , .target_residency = 5 }, /* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */ - {.exit_latency = 328 + 440 , .target_residency = 960, .valid = 1}, + {.exit_latency = 328 + 440 , .target_residency = 960 }, /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ - {.exit_latency = 460 + 518 , .target_residency = 1100, .valid = 1}, + {.exit_latency = 460 + 518 , .target_residency = 1100 }, };
#define OMAP4_NUM_STATES ARRAY_SIZE(cpuidle_params_table) @@ -155,7 +154,6 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage( struct omap4_idle_statedata *cx = &omap4_idle_data[idx]; struct cpuidle_state_usage *state_usage = &dev->states_usage[idx];
- cx->valid = cpuidle_params_table[idx].valid; cpuidle_set_statedata(state_usage, cx);
return cx; @@ -191,7 +189,6 @@ int __init omap4_idle_init(void) _fill_cstate(drv, 0, "MPUSS ON"); drv->safe_state_index = 0; cx = _fill_cstate_usage(dev, 0); - cx->valid = 1; /* C1 is always valid */ cx->cpu_state = PWRDM_POWER_ON; cx->mpu_state = PWRDM_POWER_ON; cx->mpu_logic_state = PWRDM_POWER_RET;
The cpuidle API allows to declare statically the states in the driver structure. Let's use it. We do no longer need the fill_cstate function called at runtime and by the way adding more instructions at boot time.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 57 +++++++++++++++++++++--------------- 1 files changed, 33 insertions(+), 24 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index ee0bc50..6d86b59 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -132,21 +132,39 @@ struct cpuidle_driver omap4_idle_driver = { .name = "omap4_idle", .owner = THIS_MODULE, .en_core_tk_irqen = 1, + .states = { + { + /* C1 - CPU0 ON + CPU1 ON + MPU ON */ + .exit_latency = 2 + 2, + .target_residency = 5, + .flags = CPUIDLE_FLAG_TIME_VALID, + .enter = omap4_enter_idle, + .name = "C1", + .desc = "MPUSS ON" + }, + { + /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ + .exit_latency = 328 + 440, + .target_residency = 960, + .flags = CPUIDLE_FLAG_TIME_VALID, + .enter = omap4_enter_idle, + .name = "C2", + .desc = "MPUSS CSWR", + }, + { + /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ + .exit_latency = 460 + 518, + .target_residency = 1100, + .flags = CPUIDLE_FLAG_TIME_VALID, + .enter = omap4_enter_idle, + .name = "C3", + .desc = "MPUSS OSWR", + }, + }, + .state_count = OMAP4_NUM_STATES, + .safe_state_index = 0, };
-static inline void _fill_cstate(struct cpuidle_driver *drv, - int idx, const char *descr) -{ - struct cpuidle_state *state = &drv->states[idx]; - - state->exit_latency = cpuidle_params_table[idx].exit_latency; - state->target_residency = cpuidle_params_table[idx].target_residency; - state->flags = CPUIDLE_FLAG_TIME_VALID; - state->enter = omap4_enter_idle; - sprintf(state->name, "C%d", idx + 1); - strncpy(state->desc, descr, CPUIDLE_DESC_LEN); -} - static inline struct omap4_idle_statedata *_fill_cstate_usage( struct cpuidle_device *dev, int idx) @@ -180,37 +198,28 @@ int __init omap4_idle_init(void) if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd)) return -ENODEV;
- - drv->safe_state_index = -1; dev = &per_cpu(omap4_idle_dev, cpu_id); dev->cpu = cpu_id;
- /* C1 - CPU0 ON + CPU1 ON + MPU ON */ - _fill_cstate(drv, 0, "MPUSS ON"); - drv->safe_state_index = 0; cx = _fill_cstate_usage(dev, 0); cx->cpu_state = PWRDM_POWER_ON; cx->mpu_state = PWRDM_POWER_ON; cx->mpu_logic_state = PWRDM_POWER_RET;
- /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ - _fill_cstate(drv, 1, "MPUSS CSWR"); cx = _fill_cstate_usage(dev, 1); cx->cpu_state = PWRDM_POWER_OFF; cx->mpu_state = PWRDM_POWER_RET; cx->mpu_logic_state = PWRDM_POWER_RET;
- /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ - _fill_cstate(drv, 2, "MPUSS OSWR"); cx = _fill_cstate_usage(dev, 2); cx->cpu_state = PWRDM_POWER_OFF; cx->mpu_state = PWRDM_POWER_RET; cx->mpu_logic_state = PWRDM_POWER_OFF;
- drv->state_count = OMAP4_NUM_STATES; cpuidle_register_driver(&omap4_idle_driver);
- dev->state_count = OMAP4_NUM_STATES; + dev->state_count = drv->state_count; + if (cpuidle_register_device(dev)) { pr_err("%s: CPUidle register device failed\n", __func__); return -EIO;
We do not longer need this table as we defined the values in the driver states.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 11 +---------- 1 files changed, 1 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 6d86b59..cdd7932 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -31,16 +31,7 @@ struct omap4_idle_statedata { u32 mpu_state; };
-static struct cpuidle_params cpuidle_params_table[] = { - /* C1 - CPU0 ON + CPU1 ON + MPU ON */ - {.exit_latency = 2 + 2 , .target_residency = 5 }, - /* C2- CPU0 OFF + CPU1 OFF + MPU CSWR */ - {.exit_latency = 328 + 440 , .target_residency = 960 }, - /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ - {.exit_latency = 460 + 518 , .target_residency = 1100 }, -}; - -#define OMAP4_NUM_STATES ARRAY_SIZE(cpuidle_params_table) +#define OMAP4_NUM_STATES 3
struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES]; static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index cdd7932..fb0f76e 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -33,7 +33,7 @@ struct omap4_idle_statedata {
#define OMAP4_NUM_STATES 3
-struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES]; +static struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES]; static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
/**
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 19 ++++++++++++++++++- 1 files changed, 18 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index fb0f76e..5b20115 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -33,7 +33,24 @@ struct omap4_idle_statedata {
#define OMAP4_NUM_STATES 3
-static struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES]; +static struct omap4_idle_statedata omap4_idle_data[] = { + { + .cpu_state = PWRDM_POWER_ON, + .mpu_state = PWRDM_POWER_ON, + .mpu_logic_state = PWRDM_POWER_RET, + }, + { + .cpu_state = PWRDM_POWER_OFF, + .mpu_state = PWRDM_POWER_RET, + .mpu_logic_state = PWRDM_POWER_RET, + }, + { + .cpu_state = PWRDM_POWER_OFF, + .mpu_state = PWRDM_POWER_RET, + .mpu_logic_state = PWRDM_POWER_OFF, + }, +}; + static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
/**
We are storing the 'omap4_idle_data' in the private data field if the cpuidle device. As we are using this variable only in this file, that does not really make sense. Let's use the global variable directly instead dereferencing pointers in an idle critical loop.
Also, that simplfies the code.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 15 ++++----------- 1 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index 5b20115..b82f9fe 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -24,7 +24,7 @@
#ifdef CONFIG_CPU_IDLE
-/* Machine specific information to be recorded in the C-state driver_data */ +/* Machine specific information */ struct omap4_idle_statedata { u32 cpu_state; u32 mpu_logic_state; @@ -67,8 +67,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct omap4_idle_statedata *cx = - cpuidle_get_statedata(&dev->states_usage[index]); + struct omap4_idle_statedata *cx = &omap4_idle_data[index]; u32 cpu1_state; int cpu_id = smp_processor_id();
@@ -85,7 +84,7 @@ static int omap4_enter_idle(struct cpuidle_device *dev, cpu1_state = pwrdm_read_pwrst(cpu1_pd); if (cpu1_state != PWRDM_POWER_OFF) { index = drv->safe_state_index; - cx = cpuidle_get_statedata(&dev->states_usage[index]); + cx = &omap4_idle_data[index]; }
if (index > 0) @@ -178,15 +177,9 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage( int idx) { struct omap4_idle_statedata *cx = &omap4_idle_data[idx]; - struct cpuidle_state_usage *state_usage = &dev->states_usage[idx]; - - cpuidle_set_statedata(state_usage, cx); - return cx; }
- - /** * omap4_idle_init - Init routine for OMAP4 idle * @@ -196,8 +189,8 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage( int __init omap4_idle_init(void) { struct omap4_idle_statedata *cx; - struct cpuidle_device *dev; struct cpuidle_driver *drv = &omap4_idle_driver; + struct cpuidle_device *dev; unsigned int cpu_id = 0;
mpu_pd = pwrdm_lookup("mpu_pwrdm");
Hi Daniel,
On Wed, Apr 4, 2012 at 11:42 AM, Daniel Lezcano daniel.lezcano@linaro.org wrote:
We are storing the 'omap4_idle_data' in the private data field if the cpuidle device. As we are using this variable only in this file,
Typo: _of_ the cpuidle device.
that does not really make sense. Let's use the global variable directly instead dereferencing pointers in an idle critical loop.
Also, that simplfies the code.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com
Regards, Jean
We initialized it at compile time, no need to do that at boot time.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org Reviewed-by: Jean Pihet j-pihet@ti.com Reviewed-by: Santosh Shilimkar santosh.shilimkar@ti.com --- arch/arm/mach-omap2/cpuidle44xx.c | 26 +------------------------- 1 files changed, 1 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index b82f9fe..b0dd220 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -33,7 +33,7 @@ struct omap4_idle_statedata {
#define OMAP4_NUM_STATES 3
-static struct omap4_idle_statedata omap4_idle_data[] = { +static struct omap4_idle_statedata omap4_idle_data[OMAP4_NUM_STATES] = { { .cpu_state = PWRDM_POWER_ON, .mpu_state = PWRDM_POWER_ON, @@ -172,14 +172,6 @@ struct cpuidle_driver omap4_idle_driver = { .safe_state_index = 0, };
-static inline struct omap4_idle_statedata *_fill_cstate_usage( - struct cpuidle_device *dev, - int idx) -{ - struct omap4_idle_statedata *cx = &omap4_idle_data[idx]; - return cx; -} - /** * omap4_idle_init - Init routine for OMAP4 idle * @@ -188,7 +180,6 @@ static inline struct omap4_idle_statedata *_fill_cstate_usage( */ int __init omap4_idle_init(void) { - struct omap4_idle_statedata *cx; struct cpuidle_driver *drv = &omap4_idle_driver; struct cpuidle_device *dev; unsigned int cpu_id = 0; @@ -202,21 +193,6 @@ int __init omap4_idle_init(void) dev = &per_cpu(omap4_idle_dev, cpu_id); dev->cpu = cpu_id;
- cx = _fill_cstate_usage(dev, 0); - cx->cpu_state = PWRDM_POWER_ON; - cx->mpu_state = PWRDM_POWER_ON; - cx->mpu_logic_state = PWRDM_POWER_RET; - - cx = _fill_cstate_usage(dev, 1); - cx->cpu_state = PWRDM_POWER_OFF; - cx->mpu_state = PWRDM_POWER_RET; - cx->mpu_logic_state = PWRDM_POWER_RET; - - cx = _fill_cstate_usage(dev, 2); - cx->cpu_state = PWRDM_POWER_OFF; - cx->mpu_state = PWRDM_POWER_RET; - cx->mpu_logic_state = PWRDM_POWER_OFF; - cpuidle_register_driver(&omap4_idle_driver);
dev->state_count = drv->state_count;
As suggested, this table is an optimized version for rx51 and we remove it in order to consolidate the cpuidle code between omap3 and omap4, we remove this specific data definition which is used to override the default omap3 latencies but at the cost of extra code and complexity.
In order to not lose the values which probably took time to be measured, the table is converted into a comment with an array description.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/board-rx51.c | 38 +++++++++++++++++------------------- arch/arm/mach-omap2/cpuidle34xx.c | 17 ---------------- arch/arm/mach-omap2/pm.h | 9 -------- 3 files changed, 18 insertions(+), 46 deletions(-)
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 27f01f0..2da92a6 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -59,25 +59,24 @@ static struct platform_device leds_gpio = { };
/* - * cpuidle C-states definition override from the default values. - * The 'exit_latency' field is the sum of sleep and wake-up latencies. - */ -static struct cpuidle_params rx51_cpuidle_params[] = { - /* C1 */ - {110 + 162, 5 , 1}, - /* C2 */ - {106 + 180, 309, 1}, - /* C3 */ - {107 + 410, 46057, 0}, - /* C4 */ - {121 + 3374, 46057, 0}, - /* C5 */ - {855 + 1146, 46057, 1}, - /* C6 */ - {7580 + 4134, 484329, 0}, - /* C7 */ - {7505 + 15274, 484329, 1}, -}; + * cpuidle C-states definition for rx51. + * + * The 'exit_latency' field is the sum of sleep + * and wake-up latencies. + + --------------------------------------------- + | state | exit_latency | target_residency | + --------------------------------------------- + | C1 | 110 + 162 | 5 | + | C2 | 106 + 180 | 309 | + | C3 | 107 + 410 | 46057 | + | C4 | 121 + 3374 | 46057 | + | C5 | 855 + 1146 | 46057 | + | C6 | 7580 + 4134 | 484329 | + | C7 | 7505 + 15274 | 484329 | + --------------------------------------------- + +*/
extern void __init rx51_peripherals_init(void);
@@ -98,7 +97,6 @@ static void __init rx51_init(void) struct omap_sdrc_params *sdrc_params;
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap3_pm_init_cpuidle(rx51_cpuidle_params); omap_serial_init();
sdrc_params = nokia_get_sdram_timings(); diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 5358664..3519a8b 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -298,23 +298,6 @@ select_state:
DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev);
-void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) -{ - int i; - - if (!cpuidle_board_params) - return; - - for (i = 0; i < OMAP3_NUM_STATES; i++) { - cpuidle_params_table[i].valid = cpuidle_board_params[i].valid; - cpuidle_params_table[i].exit_latency = - cpuidle_board_params[i].exit_latency; - cpuidle_params_table[i].target_residency = - cpuidle_board_params[i].target_residency; - } - return; -} - struct cpuidle_driver omap3_idle_driver = { .name = "omap3_idle", .owner = THIS_MODULE, diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 36fa90b..5646b80 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -50,15 +50,6 @@ struct cpuidle_params { u8 valid; /* validates the C-state */ };
-#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) -extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); -#else -static -inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) -{ -} -#endif - extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
Use the new cpuidle API and define in the driver the states.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 86 +++++++++++++++++++++++++----------- 1 files changed, 60 insertions(+), 26 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 3519a8b..11a2c23 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -301,23 +301,68 @@ DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); struct cpuidle_driver omap3_idle_driver = { .name = "omap3_idle", .owner = THIS_MODULE, + .states = { + { + .enter = omap3_enter_idle, + .exit_latency = 2 + 2, + .target_residency = 5, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C1", + .desc = "MPU ON + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 10 + 10, + .target_residency = 30, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C2", + .desc = "MPU ON + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 50 + 50, + .target_residency = 300, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C3", + .desc = "MPU RET + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 1500 + 1800, + .target_residency = 4000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C4", + .desc = "MPU OFF + CORE ON", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 2500 + 7500, + .target_residency = 12000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C5", + .desc = "MPU RET + CORE RET", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 3000 + 8500, + .target_residency = 15000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C6", + .desc = "MPU OFF + CORE RET", + }, + { + .enter = omap3_enter_idle_bm, + .exit_latency = 10000 + 30000, + .target_residency = 30000, + .flags = CPUIDLE_FLAG_TIME_VALID, + .name = "C7", + .desc = "MPU OFF + CORE OFF", + }, + }, + .state_count = OMAP3_NUM_STATES, + .safe_state_index = 0, };
-/* Helper to fill the C-state common data*/ -static inline void _fill_cstate(struct cpuidle_driver *drv, - int idx, const char *descr) -{ - struct cpuidle_state *state = &drv->states[idx]; - - state->exit_latency = cpuidle_params_table[idx].exit_latency; - state->target_residency = cpuidle_params_table[idx].target_residency; - state->flags = CPUIDLE_FLAG_TIME_VALID; - state->enter = omap3_enter_idle_bm; - sprintf(state->name, "C%d", idx + 1); - strncpy(state->desc, descr, CPUIDLE_DESC_LEN); - -} - /* Helper to register the driver_data */ static inline struct omap3_idle_statedata *_fill_cstate_usage( struct cpuidle_device *dev, @@ -350,50 +395,40 @@ int __init omap3_idle_init(void) cam_pd = pwrdm_lookup("cam_pwrdm");
- drv->safe_state_index = -1; dev = &per_cpu(omap3_idle_dev, smp_processor_id());
/* C1 . MPU WFI + Core active */ - _fill_cstate(drv, 0, "MPU ON + CORE ON"); - (&drv->states[0])->enter = omap3_enter_idle; - drv->safe_state_index = 0; cx = _fill_cstate_usage(dev, 0); cx->valid = 1; /* C1 is always valid */ cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON;
/* C2 . MPU WFI + Core inactive */ - _fill_cstate(drv, 1, "MPU ON + CORE ON"); cx = _fill_cstate_usage(dev, 1); cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON;
/* C3 . MPU CSWR + Core inactive */ - _fill_cstate(drv, 2, "MPU RET + CORE ON"); cx = _fill_cstate_usage(dev, 2); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_ON;
/* C4 . MPU OFF + Core inactive */ - _fill_cstate(drv, 3, "MPU OFF + CORE ON"); cx = _fill_cstate_usage(dev, 3); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_ON;
/* C5 . MPU RET + Core RET */ - _fill_cstate(drv, 4, "MPU RET + CORE RET"); cx = _fill_cstate_usage(dev, 4); cx->mpu_state = PWRDM_POWER_RET; cx->core_state = PWRDM_POWER_RET;
/* C6 . MPU OFF + Core RET */ - _fill_cstate(drv, 5, "MPU OFF + CORE RET"); cx = _fill_cstate_usage(dev, 5); cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_RET;
/* C7 . MPU OFF + Core OFF */ - _fill_cstate(drv, 6, "MPU OFF + CORE OFF"); cx = _fill_cstate_usage(dev, 6); /* * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot @@ -411,7 +446,6 @@ int __init omap3_idle_init(void) drv->state_count = OMAP3_NUM_STATES; cpuidle_register_driver(&omap3_idle_driver);
- dev->state_count = OMAP3_NUM_STATES; if (cpuidle_register_device(dev)) { printk(KERN_ERR "%s: CPUidle register device failed\n", __func__);
With the previous changes all the states are valid, except the last state which can be handled by decreasing the number of states.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 12 +++--------- 1 files changed, 3 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 11a2c23..3f46e45 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -67,7 +67,6 @@ static struct cpuidle_params cpuidle_params_table[] = { struct omap3_idle_statedata { u32 mpu_state; u32 core_state; - u8 valid; }; struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES];
@@ -191,8 +190,7 @@ static int next_valid_state(struct cpuidle_device *dev, }
/* Check if current state is valid */ - if ((cx->valid) && - (cx->mpu_state >= mpu_deepest_state) && + if ((cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { return index; } else { @@ -216,8 +214,7 @@ static int next_valid_state(struct cpuidle_device *dev, idx--; for (; idx >= 0; idx--) { cx = cpuidle_get_statedata(&dev->states_usage[idx]); - if ((cx->valid) && - (cx->mpu_state >= mpu_deepest_state) && + if ((cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { next_index = idx; break; @@ -371,7 +368,6 @@ static inline struct omap3_idle_statedata *_fill_cstate_usage( struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; struct cpuidle_state_usage *state_usage = &dev->states_usage[idx];
- cx->valid = cpuidle_params_table[idx].valid; cpuidle_set_statedata(state_usage, cx);
return cx; @@ -399,7 +395,6 @@ int __init omap3_idle_init(void)
/* C1 . MPU WFI + Core active */ cx = _fill_cstate_usage(dev, 0); - cx->valid = 1; /* C1 is always valid */ cx->mpu_state = PWRDM_POWER_ON; cx->core_state = PWRDM_POWER_ON;
@@ -436,14 +431,13 @@ int __init omap3_idle_init(void) * We disable C7 state as a result. */ if (IS_PM34XX_ERRATUM(PM_SDRC_WAKEUP_ERRATUM_i583)) { - cx->valid = 0; + drv->state_count = OMAP3_NUM_STATES - 1; pr_warn("%s: core off state C7 disabled due to i583\n", __func__); } cx->mpu_state = PWRDM_POWER_OFF; cx->core_state = PWRDM_POWER_OFF;
- drv->state_count = OMAP3_NUM_STATES; cpuidle_register_driver(&omap3_idle_driver);
if (cpuidle_register_device(dev)) {
We do not longer need the ''cpuidle_params_table' array as we defined the states in the driver and we checked they are all valid.
We also remove the structure definition as it is no longer used.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 28 +++------------------------- arch/arm/mach-omap2/pm.h | 12 ------------ 2 files changed, 3 insertions(+), 37 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 3f46e45..cdf1b8f 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -38,36 +38,14 @@
#ifdef CONFIG_CPU_IDLE
-/* - * The latencies/thresholds for various C states have - * to be configured from the respective board files. - * These are some default values (which might not provide - * the best power savings) used on boards which do not - * pass these details from the board file. - */ -static struct cpuidle_params cpuidle_params_table[] = { - /* C1 */ - {2 + 2, 5, 1}, - /* C2 */ - {10 + 10, 30, 1}, - /* C3 */ - {50 + 50, 300, 1}, - /* C4 */ - {1500 + 1800, 4000, 1}, - /* C5 */ - {2500 + 7500, 12000, 1}, - /* C6 */ - {3000 + 8500, 15000, 1}, - /* C7 */ - {10000 + 30000, 300000, 1}, -}; -#define OMAP3_NUM_STATES ARRAY_SIZE(cpuidle_params_table) - /* Mach specific information to be recorded in the C-state driver_data */ struct omap3_idle_statedata { u32 mpu_state; u32 core_state; }; + +#define OMAP3_NUM_STATES 7 + struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES];
struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd; diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 5646b80..7856489 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -38,18 +38,6 @@ static inline int omap4_opp_init(void) } #endif
-/* - * cpuidle mach specific parameters - * - * The board code can override the default C-states definition using - * omap3_pm_init_cpuidle - */ -struct cpuidle_params { - u32 exit_latency; /* exit_latency = sleep + wake-up latencies */ - u32 target_residency; - u8 valid; /* validates the C-state */ -}; - extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 31 ++++++++++++++++++++++++++++++- 1 files changed, 30 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index cdf1b8f..332b636 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -46,7 +46,36 @@ struct omap3_idle_statedata {
#define OMAP3_NUM_STATES 7
-struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES]; +struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES] = { + { + .mpu_state = PWRDM_POWER_ON, + .core_state = PWRDM_POWER_ON, + }, + { + .mpu_state = PWRDM_POWER_ON, + .core_state = PWRDM_POWER_ON, + }, + { + .mpu_state = PWRDM_POWER_RET, + .core_state = PWRDM_POWER_ON, + }, + { + .mpu_state = PWRDM_POWER_OFF, + .core_state = PWRDM_POWER_ON, + }, + { + .mpu_state = PWRDM_POWER_RET, + .core_state = PWRDM_POWER_RET, + }, + { + .mpu_state = PWRDM_POWER_OFF, + .core_state = PWRDM_POWER_RET, + }, + { + .mpu_state = PWRDM_POWER_OFF, + .core_state = PWRDM_POWER_OFF, + }, +};
struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;
We are storing the 'omap3_idle_data' in the private data field if the cpuidle device. As we are using this variable only in this file, that does not really make sense. Let's use the global variable directly instead dereferencing pointers in an idle critical loop.
As the table is initialized statically, let's remove the initialization at startup too.
Also, that simplfies the code.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 65 ++++-------------------------------- 1 files changed, 8 insertions(+), 57 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 332b636..e4738eb 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -97,8 +97,7 @@ static int __omap3_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct omap3_idle_statedata *cx = - cpuidle_get_statedata(&dev->states_usage[index]); + struct omap3_idle_statedata *cx = &omap3_idle_data[index]; u32 mpu_state = cx->mpu_state, core_state = cx->core_state;
local_fiq_disable(); @@ -178,9 +177,8 @@ static int next_valid_state(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - struct cpuidle_state_usage *curr_usage = &dev->states_usage[index]; struct cpuidle_state *curr = &drv->states[index]; - struct omap3_idle_statedata *cx = cpuidle_get_statedata(curr_usage); + struct omap3_idle_statedata *cx = &omap3_idle_data[index]; u32 mpu_deepest_state = PWRDM_POWER_RET; u32 core_deepest_state = PWRDM_POWER_RET; int next_index = -1; @@ -220,7 +218,7 @@ static int next_valid_state(struct cpuidle_device *dev, */ idx--; for (; idx >= 0; idx--) { - cx = cpuidle_get_statedata(&dev->states_usage[idx]); + cx = &omap3_idle_data[idx]; if ((cx->mpu_state >= mpu_deepest_state) && (cx->core_state >= core_deepest_state)) { next_index = idx; @@ -277,7 +275,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, * Prevent PER off if CORE is not in retention or off as this * would disable PER wakeups completely. */ - cx = cpuidle_get_statedata(&dev->states_usage[index]); + cx = &omap3_idle_data[index]; core_next_state = cx->core_state; per_next_state = per_saved_state = pwrdm_read_next_pwrst(per_pd); if ((per_next_state == PWRDM_POWER_OFF) && @@ -367,19 +365,6 @@ struct cpuidle_driver omap3_idle_driver = { .safe_state_index = 0, };
-/* Helper to register the driver_data */ -static inline struct omap3_idle_statedata *_fill_cstate_usage( - struct cpuidle_device *dev, - int idx) -{ - struct omap3_idle_statedata *cx = &omap3_idle_data[idx]; - struct cpuidle_state_usage *state_usage = &dev->states_usage[idx]; - - cpuidle_set_statedata(state_usage, cx); - - return cx; -} - /** * omap3_idle_init - Init routine for OMAP3 idle * @@ -390,48 +375,12 @@ int __init omap3_idle_init(void) { struct cpuidle_device *dev; struct cpuidle_driver *drv = &omap3_idle_driver; - struct omap3_idle_statedata *cx;
mpu_pd = pwrdm_lookup("mpu_pwrdm"); core_pd = pwrdm_lookup("core_pwrdm"); per_pd = pwrdm_lookup("per_pwrdm"); cam_pd = pwrdm_lookup("cam_pwrdm");
- - dev = &per_cpu(omap3_idle_dev, smp_processor_id()); - - /* C1 . MPU WFI + Core active */ - cx = _fill_cstate_usage(dev, 0); - cx->mpu_state = PWRDM_POWER_ON; - cx->core_state = PWRDM_POWER_ON; - - /* C2 . MPU WFI + Core inactive */ - cx = _fill_cstate_usage(dev, 1); - cx->mpu_state = PWRDM_POWER_ON; - cx->core_state = PWRDM_POWER_ON; - - /* C3 . MPU CSWR + Core inactive */ - cx = _fill_cstate_usage(dev, 2); - cx->mpu_state = PWRDM_POWER_RET; - cx->core_state = PWRDM_POWER_ON; - - /* C4 . MPU OFF + Core inactive */ - cx = _fill_cstate_usage(dev, 3); - cx->mpu_state = PWRDM_POWER_OFF; - cx->core_state = PWRDM_POWER_ON; - - /* C5 . MPU RET + Core RET */ - cx = _fill_cstate_usage(dev, 4); - cx->mpu_state = PWRDM_POWER_RET; - cx->core_state = PWRDM_POWER_RET; - - /* C6 . MPU OFF + Core RET */ - cx = _fill_cstate_usage(dev, 5); - cx->mpu_state = PWRDM_POWER_OFF; - cx->core_state = PWRDM_POWER_RET; - - /* C7 . MPU OFF + Core OFF */ - cx = _fill_cstate_usage(dev, 6); /* * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot * enable OFF mode in a stable form for previous revisions. @@ -442,11 +391,13 @@ int __init omap3_idle_init(void) pr_warn("%s: core off state C7 disabled due to i583\n", __func__); } - cx->mpu_state = PWRDM_POWER_OFF; - cx->core_state = PWRDM_POWER_OFF;
cpuidle_register_driver(&omap3_idle_driver);
+ dev = &per_cpu(omap3_idle_dev, smp_processor_id()); + dev->cpu = 0; + dev->state_count = drv->state_count; + if (cpuidle_register_device(dev)) { printk(KERN_ERR "%s: CPUidle register device failed\n", __func__);
Daniel,
On Wed, Apr 4, 2012 at 11:42 AM, Daniel Lezcano daniel.lezcano@linaro.org wrote:
We are storing the 'omap3_idle_data' in the private data field if the cpuidle device. As we are using this variable only in this file,
Typo: _of_ the cpuidle device.
that does not really make sense. Let's use the global variable directly instead dereferencing pointers in an idle critical loop.
As the table is initialized statically, let's remove the initialization at startup too.
Also, that simplfies the code.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org
Regards, Jean
Simplify the indentation by removing the useless 'else' statement. Remove the first loop for the 'idx' search as we have it already with the 'index' passed as parameter.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 53 +++++++++++++----------------------- 1 files changed, 19 insertions(+), 34 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index e4738eb..35a1471 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -174,13 +174,12 @@ static inline int omap3_enter_idle(struct cpuidle_device *dev, * if it satisfies the enable_off_mode condition. */ static int next_valid_state(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) + struct cpuidle_driver *drv, int index) { - struct cpuidle_state *curr = &drv->states[index]; struct omap3_idle_statedata *cx = &omap3_idle_data[index]; u32 mpu_deepest_state = PWRDM_POWER_RET; u32 core_deepest_state = PWRDM_POWER_RET; + int idx; int next_index = -1;
if (enable_off_mode) { @@ -196,42 +195,28 @@ static int next_valid_state(struct cpuidle_device *dev,
/* Check if current state is valid */ if ((cx->mpu_state >= mpu_deepest_state) && - (cx->core_state >= core_deepest_state)) { + (cx->core_state >= core_deepest_state)) return index; - } else { - int idx = OMAP3_NUM_STATES - 1; - - /* Reach the current state starting at highest C-state */ - for (; idx >= 0; idx--) { - if (&drv->states[idx] == curr) { - next_index = idx; - break; - } - } - - /* Should never hit this condition */ - WARN_ON(next_index == -1);
- /* - * Drop to next valid state. - * Start search from the next (lower) state. - */ - idx--; - for (; idx >= 0; idx--) { - cx = &omap3_idle_data[idx]; - if ((cx->mpu_state >= mpu_deepest_state) && - (cx->core_state >= core_deepest_state)) { - next_index = idx; - break; - } + /* + * Drop to next valid state. + * Start search from the next (lower) state. + */ + for (idx = index - 1; idx >= 0; idx--) { + cx = &omap3_idle_data[idx]; + if ((cx->mpu_state >= mpu_deepest_state) && + (cx->core_state >= core_deepest_state)) { + next_index = idx; + break; } - /* - * C1 is always valid. - * So, no need to check for 'next_index == -1' outside - * this loop. - */ }
+ /* + * C1 is always valid. + * So, no need to check for 'next_index == -1' outside + * this loop. + */ + return next_index; }
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 35a1471..f54e6ae 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -46,7 +46,7 @@ struct omap3_idle_statedata {
#define OMAP3_NUM_STATES 7
-struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES] = { +static struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES] = { { .mpu_state = PWRDM_POWER_ON, .core_state = PWRDM_POWER_ON,
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/Makefile | 11 +++++++---- arch/arm/mach-omap2/cpuidle34xx.c | 8 -------- arch/arm/mach-omap2/cpuidle44xx.c | 8 -------- arch/arm/mach-omap2/pm.h | 17 +++++++++++++++-- 4 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 49f92bc..f46c735 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -64,10 +64,8 @@ endif ifeq ($(CONFIG_PM),y) obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o obj-$(CONFIG_ARCH_OMAP2) += sleep24xx.o -obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o \ - cpuidle34xx.o -obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o \ - cpuidle44xx.o +obj-$(CONFIG_ARCH_OMAP3) += pm34xx.o sleep34xx.o +obj-$(CONFIG_ARCH_OMAP4) += pm44xx.o omap-mpuss-lowpower.o obj-$(CONFIG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_OMAP_SMARTREFLEX) += sr_device.o smartreflex.o obj-$(CONFIG_OMAP_SMARTREFLEX_CLASS3) += smartreflex-class3.o @@ -81,6 +79,11 @@ endif
endif
+ifeq ($(CONFIG_CPU_IDLE),y) +obj-$(CONFIG_ARCH_OMAP3) += cpuidle34xx.o +obj-$(CONFIG_ARCH_OMAP4) += cpuidle44xx.o +endif + # PRCM obj-y += prm_common.o obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index f54e6ae..882d349 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -36,8 +36,6 @@ #include "control.h" #include "common.h"
-#ifdef CONFIG_CPU_IDLE - /* Mach specific information to be recorded in the C-state driver_data */ struct omap3_idle_statedata { u32 mpu_state; @@ -391,9 +389,3 @@ int __init omap3_idle_init(void)
return 0; } -#else -int __init omap3_idle_init(void) -{ - return 0; -} -#endif /* CONFIG_CPU_IDLE */ diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c index b0dd220..41303a7 100644 --- a/arch/arm/mach-omap2/cpuidle44xx.c +++ b/arch/arm/mach-omap2/cpuidle44xx.c @@ -22,8 +22,6 @@ #include "pm.h" #include "prm.h"
-#ifdef CONFIG_CPU_IDLE - /* Machine specific information */ struct omap4_idle_statedata { u32 cpu_state; @@ -204,9 +202,3 @@ int __init omap4_idle_init(void)
return 0; } -#else -int __init omap4_idle_init(void) -{ - return 0; -} -#endif /* CONFIG_CPU_IDLE */ diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 7856489..ab04d3b 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -15,12 +15,25 @@
#include "powerdomain.h"
+#ifdef CONFIG_CPU_IDLE +extern int __init omap3_idle_init(void); +extern int __init omap4_idle_init(void); +#else +static inline int omap3_idle_init(void) +{ + return 0; +} + +static inline int omap4_idle_init(void) +{ + return 0; +} +#endif + extern void *omap3_secure_ram_storage; extern void omap3_pm_off_mode_enable(int); extern void omap_sram_idle(void); extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); -extern int omap3_idle_init(void); -extern int omap4_idle_init(void); extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused); extern int (*omap_pm_suspend)(void);
and check the powerdomain lookup is successful.
Signed-off-by: Daniel Lezcano daniel.lezcano@linaro.org --- arch/arm/mach-omap2/cpuidle34xx.c | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 882d349..413aac4 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -75,7 +75,7 @@ static struct omap3_idle_statedata omap3_idle_data[OMAP3_NUM_STATES] = { }, };
-struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd; +static struct powerdomain *mpu_pd, *core_pd, *per_pd, *cam_pd;
static int _cpuidle_allow_idle(struct powerdomain *pwrdm, struct clockdomain *clkdm) @@ -364,6 +364,9 @@ int __init omap3_idle_init(void) per_pd = pwrdm_lookup("per_pwrdm"); cam_pd = pwrdm_lookup("cam_pwrdm");
+ if (!mpu_pd || !core_pd || !per_pd || !cam_pd) + return -ENODEV; + /* * Erratum i583: implementation for ES rev < Es1.2 on 3630. We cannot * enable OFF mode in a stable form for previous revisions.
Daniel,
On Wed, Apr 4, 2012 at 11:42 AM, Daniel Lezcano daniel.lezcano@linaro.org wrote:
This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture.
Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1.
Ok with this patch set, except the very minor remarks on 2 patches.
FWIW: Reviewed-by: Jean Pihet j-pihet@ti.com
Thanks, Jean
Daniel Lezcano (17): ARM: OMAP4: cpuidle - Remove unused valid field ARM: OMAP4: cpuidle - Declare the states with the driver declaration ARM: OMAP4: cpuidle - Remove the cpuidle_params_table table ARM: OMAP4: cpuidle - fix static omap4_idle_data declaration ARM: OMAP4: cpuidle - Initialize omap4_idle_data at compile time ARM: OMAP4: cpuidle - use the omap4_idle_data variable directly ARM: OMAP4: cpuidle - remove omap4_idle_data initialization at boot time ARM: OMAP3: cpuidle - remove rx51 cpuidle parameters table ARM: OMAP3: define cpuidle statically ARM: OMAP3: cpuidle - remove the 'valid' field ARM: OMAP3: cpuidle - remove cpuidle_params_table ARM: OMAP3: define statically the omap3_idle_data ARM: OMAP3: cpuidle - use omap3_idle_data directly ARM: OMAP3 : cpuidle - simplify next_valid_state ARM: OMAP3: set omap3_idle_data as static ARM: OMAP3/4: consolidate cpuidle Makefile ARM: OMAP3: cpuidle - set global variables static
arch/arm/mach-omap2/Makefile | 11 +- arch/arm/mach-omap2/board-rx51.c | 38 +++--- arch/arm/mach-omap2/cpuidle34xx.c | 299 +++++++++++++++---------------------- arch/arm/mach-omap2/cpuidle44xx.c | 135 +++++++---------- arch/arm/mach-omap2/pm.h | 38 ++--- 5 files changed, 219 insertions(+), 302 deletions(-)
-- 1.7.5.4
linaro-dev mailing list linaro-dev@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-dev
On 04/04/2012 06:05 PM, Jean Pihet wrote:
Daniel,
On Wed, Apr 4, 2012 at 11:42 AM, Daniel Lezcano daniel.lezcano@linaro.org wrote:
This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture.
Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1.
Ok with this patch set, except the very minor remarks on 2 patches.
FWIW: Reviewed-by: Jean Pihetj-pihet@ti.com
Thanks for the review Jean.
-- Daniel
Hi Daniel,
Daniel Lezcano daniel.lezcano@linaro.org writes:
This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture.
Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1.
Any reason this wasn't posted to linux-omap?
Was that an oversight? or is this just RFC?
Kevin
On 04/04/2012 08:40 PM, Kevin Hilman wrote:
Hi Daniel,
Daniel Lezcanodaniel.lezcano@linaro.org writes:
This patchset makes some cleanup on these cpuidle drivers and consolidate the code across both architecture.
Tested on OMAP3 (igepV2). Partially tested on OMAP4 (pandaboard), without offlining the cpu1.
Any reason this wasn't posted to linux-omap?
Was that an oversight? or is this just RFC?
Oops, it was an oversight :/
I will resend the patchset with the typos fixed.
Thanks -- Daniel