This series fixes a couple of problems with the ARM support in libTBB; the build system did not detect ARM correctly and external code that referenced TBB may have had problems building for Thumb state.
These patches apply against tbb41_20130516oss, and have been tested under Fedora 18 and Debian Wheezy (with `make test' and `make examples').
Any comments/critique welcome, as I aim to send these patches upstream.
Leif Lindholm (1): ARM: Add IT instructions to inline assembler
Steve Capper (1): ARM: Correct build architecture detection logic
build/linux.inc | 4 ++-- include/tbb/machine/gcc_armv7.h | 3 +++ 2 files changed, 5 insertions(+), 2 deletions(-)
Our initial patches appear to have been mangled a bit. We check for armv7l (not seventy-one), and correct the whitespace.
Signed-off-by: Steve Capper steve.capper@linaro.org --- build/linux.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/build/linux.inc b/build/linux.inc index 1c96d86..16ba6f5 100644 --- a/build/linux.inc +++ b/build/linux.inc @@ -56,8 +56,8 @@ ifndef arch ifeq ($(uname_m),sparc64) export arch:=sparc endif - ifeq ($(uname_m),armv71) - export arch :=armv7 + ifeq ($(uname_m),armv7l) + export arch:=armv7 endif ifndef arch export arch:=$(uname_m)
From: Leif Lindholm leif.lindholm@linaro.org
External code that uses libTBB will pull in gcc_armv7.h, which has inline assembler that contains conditional instructions.
Unfortunately these external programs won't necessarily have the `-Wa,-mimplicit-it=thumb' build option when compiling for Thumb state, thus may fail to build for Thumb under older build systems.
To remedy this, we add the IT instructions to gcc_armv7.h that would normally be added implicitly by the assembler.
Signed-off-by: Steve Capper steve.capper@linaro.org --- include/tbb/machine/gcc_armv7.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/include/tbb/machine/gcc_armv7.h b/include/tbb/machine/gcc_armv7.h index fde1f7a..05ef6a9 100644 --- a/include/tbb/machine/gcc_armv7.h +++ b/include/tbb/machine/gcc_armv7.h @@ -88,6 +88,7 @@ static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, i "ldrex %1, [%3]\n" "mov %0, #0\n" "cmp %1, %4\n" + "it eq\n" "strexeq %0, %5, [%3]\n" : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int32_t*)ptr) : "r" ((int32_t *)ptr), "Ir" (comparand), "r" (value) @@ -118,7 +119,9 @@ static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, i "mov %0, #0\n" "ldrexd %1, %H1, [%3]\n" "cmp %1, %4\n" + "it eq\n" "cmpeq %H1, %H4\n" + "it eq\n" "strexdeq %0, %5, %H5, [%3]" : "=&r" (res), "=&r" (oldval), "+Qo" (*(volatile int64_t*)ptr) : "r" ((int64_t *)ptr), "r" (comparand), "r" (value)
-
Steve Capper