linaro-dev January 2012

linaro-dev@lists.linaro.org

125 participants
124 discussions

[PATCH] Origen: Select SCLKMPLL as FIMD0 parent clock

by Chander Kashyap

Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- board/samsung/origen/lowlevel_init.S | 5 +++++ board/samsung/origen/origen_setup.h | 12 ++++++++++++ 2 files changed, 17 insertions(+), 0 deletions(-) diff --git a/board/samsung/origen/lowlevel_init.S b/board/samsung/origen/lowlevel_init.S index 0eebbfc..9283201 100644 --- a/board/samsung/origen/lowlevel_init.S +++ b/board/samsung/origen/lowlevel_init.S @@ -158,6 +158,11 @@ system_clock_init: ldr r2, =CLK_SRC_PERIL0_OFFSET str r1, [r0, r2] + /* FIMD0 */ + ldr r1, =CLK_SRC_LCD0_VAL + ldr r2, =CLK_SRC_LCD0_OFFSET + str r1, [r0, r2] + /* wait ?us */ mov r1, #0x10000 3: subs r1, r1, #1 diff --git a/board/samsung/origen/origen_setup.h b/board/samsung/origen/origen_setup.h index d949ad2..94cccca 100644 --- a/board/samsung/origen/origen_setup.h +++ b/board/samsung/origen/origen_setup.h @@ -56,6 +56,8 @@ #define CLK_SRC_PERIL0_OFFSET 0xC250 #define CLK_DIV_PERIL0_OFFSET 0xC550 +#define CLK_SRC_LCD0_OFFSET 0xC234 + #define APLL_LOCK_OFFSET 0x14000 #define MPLL_LOCK_OFFSET 0x14008 #define APLL_CON0_OFFSET 0x14100 @@ -351,6 +353,16 @@ | (UART1_RATIO << 4) \ | (UART0_RATIO << 0)) +/* CLK_SRC_LCD0 */ +#define FIMD_SEL_SCLKMPLL 6 +#define MDNIE0_SEL_XUSBXTI 1 +#define MDNIE_PWM0_SEL_XUSBXTI 1 +#define MIPI0_SEL_XUSBXTI 1 +#define CLK_SRC_LCD0_VAL ((MIPI0_SEL_XUSBXTI << 12) \ + | (MDNIE_PWM0_SEL_XUSBXTI << 8) \ + | (MDNIE0_SEL_XUSBXTI << 4) \ + | (FIMD_SEL_SCLKMPLL << 0)) + /* Required period to generate a stable clock output */ /* PLL_LOCK_TIME */ #define PLL_LOCKTIME 0x1C20 -- 1.7.5.4

12 years, 11 months

[PATCH V2 0/2] Exynos Related fixes

by Chander Kashyap

Chander Kashyap (2): Exynos: PWM: Add TCMPB3 field in pwm structure Exynos: Fix ARM Clock frequency calculation arch/arm/cpu/armv7/exynos/clock.c | 15 +++++++++------ arch/arm/include/asm/arch-exynos/pwm.h | 2 +- 2 files changed, 10 insertions(+), 7 deletions(-) -- 1.7.5.4

12 years, 11 months

[PATCH] omap: use usleep_range() instead of mdelay()/udelay()

by Dmitry Antipov

From e4db974edb5c46360465462518a88b83f1bdedf6 Mon Sep 17 00:00:00 2001 From: Dmitry Antipov <dmitry.antipov(a)linaro.org> Date: Wed, 21 Dec 2011 10:57:08 +0400 Subject: [PATCH] omap: use usleep_range() instead of mdelay()/udelay() --- arch/arm/mach-omap2/omap_phy_internal.c | 2 +- arch/arm/mach-omap2/vc.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 58775e3..e5dff64 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -145,7 +145,7 @@ int omap4430_phy_suspend(struct device *dev, int suspend) /* power on the phy */ if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) { __raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF); - mdelay(200); + usleep_range(200000, 201000); } /* restore the context */ diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c index 031d116..57f44d5 100644 --- a/arch/arm/mach-omap2/vc.c +++ b/arch/arm/mach-omap2/vc.c @@ -151,7 +151,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, /* SMPS slew rate / step size. 2us added as buffer. */ smps_delay = ((smps_steps * voltdm->pmic->step_size) / voltdm->pmic->slew_rate) + 2; - udelay(smps_delay); + usleep_range(smps_delay, smps_delay + 10); } /* vc_bypass_scale - VC bypass method of voltage scaling */ -- 1.7.7.4

12 years, 11 months

[PATCH v4 0/7] add a generic cpufreq driver

by Richard Zhao

Thanks Arnd, Mark, Jamie, Rob, for your review. Changes in v4: - add depends on HAVE_CLK && OF && REGULATOR - add set_cpu_freq fail check - regulator_put wehn module exit - add pr_fmt and convert all printk to pr_xxx - use voltage range - comment and doc fix - add cpu_volts value pre-check in module init - add helpfull module parameter max_freq - remove compatible string check on Arnd's comment. - remove generic-cpufreq to clk-reg-cpufreq Changes in v3: - move adjusting smp loops_per_jiffy to arm common code, and also adjust global loops_per_jiffy. - remove adjusting loops_per_jiffy in imx and omap cpufreq drivers. - check compatible "generic-cpufreq" when module_init - change printk to pr_xxx - add generic-cpufreq DT binding doc Changes in v2: - add volatage change support - change '_' in property name to '-' - use initial value to calculate loops_per_jiffy - fix reading cpu_volts property bug - let cpufreq_frequency_table_cpuinfo routines handle cpu_freq_khz_max/min - don't change freq in arm_cpufreq_exit, because every core share the same freq. - use unsigned long describe frequency as much as possible. Because clk use unsigned long, but cpufreq use unsigned int. [PATCH v4 1/7] ARM: add cpufreq transiton notifier to adjust [PATCH v4 2/7] arm/imx: cpufreq: remove loops_per_jiffy recalculate [PATCH v4 3/7] cpufreq: OMAP: remove loops_per_jiffy recalculate for [PATCH v4 4/7] cpufreq: add clk-reg cpufreq driver [PATCH v4 5/7] dts/imx6q: add cpufreq property [PATCH v4 6/7] arm/imx6q: register arm_clk as cpu to clkdev [PATCH v4 7/7] arm/imx6q: select ARCH_HAS_CPUFREQ

12 years, 11 months

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linaro-dev January 2012