linaro-dev April 2012

linaro-dev@lists.linaro.org

113 participants
85 discussions

[PATCH] ARM: imx: Fix imx5 idle logic bug

by Robert Lee

The imx5_idle() check of the tzic_eanble_wake() return value uses incorrect (inverted) logic causing all attempt to idle to fail. Signed-off-by: Robert Lee <rob.lee(a)linaro.org> --- arch/arm/mach-imx/mm-imx5.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index 05250ae..e10f391 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -35,7 +35,7 @@ static void imx5_idle(void) } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); - if (tzic_enable_wake() != 0) + if (!tzic_enable_wake()) cpu_do_idle(); clk_disable(gpc_dvfs_clk); } -- 1.7.10

12 years

[PATCH][PM-QA] add cpuidle_02 and cpuidle_03 tests

by Daniel Lezcano

This patch provides a couple of tests for cpuidle in addition with a small program which behaves to sollicitate the cpuidle drivers especially when both cores needs to reach the same C-states. The program forks as many online processors present on the system and set the affinity to it. Then it runs, during 120 secs, small chunks of busy loops and idle loops. When there is something wrong with the cpuidle driver, this program often triggers the problem which results in a kernel panic, tasks hung warning or system hang. Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- .gitignore | 5 +- Test.mk | 11 ++- cpuidle/cpuidle_02.sh | 37 ++++++++++ cpuidle/cpuidle_02.txt | 1 + cpuidle/cpuidle_03.sh | 60 +++++++++++++++ cpuidle/cpuidle_03.txt | 1 + cpuidle/cpuidle_killer.c | 180 ++++++++++++++++++++++++++++++++++++++++++++++ include/functions.sh | 8 ++ utils/Makefile | 12 +--- 9 files changed, 300 insertions(+), 15 deletions(-) create mode 100755 cpuidle/cpuidle_02.sh create mode 100644 cpuidle/cpuidle_02.txt create mode 100755 cpuidle/cpuidle_03.sh create mode 100644 cpuidle/cpuidle_03.txt create mode 100644 cpuidle/cpuidle_killer.c diff --git a/.gitignore b/.gitignore index c833157..e21ff87 100644 --- a/.gitignore +++ b/.gitignore @@ -1,4 +1,7 @@ - +.pc +*.log utils/cpuburn utils/cpucycle utils/nanosleep +cpuidle/cpuidle_killer +patches diff --git a/Test.mk b/Test.mk index a265286..a48a18c 100644 --- a/Test.mk +++ b/Test.mk @@ -24,8 +24,12 @@ TST=$(wildcard *.sh) LOG=$(TST:.sh=.log) +CFLAGS?=-g -Wall +CC?=gcc +SRC=$(wildcard *.c) +EXEC=$(SRC:%.c=%) -check: uncheck $(LOG) +check: uncheck $(EXEC) $(LOG) %.log: %.sh @echo "###" @@ -36,8 +40,9 @@ check: uncheck $(LOG) @./$< 2> $@ clean: - @test ! -z "$(LOG)" && rm -f $(LOG) + rm -f *.o $(EXEC) -uncheck: clean +uncheck: + -@test ! -z "$(LOG)" && rm -f $(LOG) recheck: uncheck check diff --git a/cpuidle/cpuidle_02.sh b/cpuidle/cpuidle_02.sh new file mode 100755 index 0000000..1b155c1 --- /dev/null +++ b/cpuidle/cpuidle_02.sh @@ -0,0 +1,37 @@ +#!/bin/bash +# +# PM-QA validation test suite for the power management on Linux +# +# Copyright (C) 2011, Linaro Limited. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +# +# Contributors: +# Daniel Lezcano <daniel.lezcano(a)linaro.org> (IBM Corporation) +# - initial API and implementation +# + +# URL : https://wiki.linaro.org/WorkingGroups/PowerManagement/Doc/QA/Scripts#cpuidl… + +source ../include/functions.sh + +CPUIDLE_KILLER=./cpuidle_killer + +if [ $(id -u) != 0 ]; then + log_skip "run as non-root" + exit 0 +fi + +check "cpuidle program runs successfully (120 secs)" "./$CPUIDLE_KILLER" diff --git a/cpuidle/cpuidle_02.txt b/cpuidle/cpuidle_02.txt new file mode 100644 index 0000000..3f0b1ef --- /dev/null +++ b/cpuidle/cpuidle_02.txt @@ -0,0 +1 @@ +Run a cpuidle program killer diff --git a/cpuidle/cpuidle_03.sh b/cpuidle/cpuidle_03.sh new file mode 100755 index 0000000..22bca10 --- /dev/null +++ b/cpuidle/cpuidle_03.sh @@ -0,0 +1,60 @@ +#!/bin/bash +# +# PM-QA validation test suite for the power management on Linux +# +# Copyright (C) 2011, Linaro Limited. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License +# as published by the Free Software Foundation; either version 2 +# of the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +# +# Contributors: +# Daniel Lezcano <daniel.lezcano(a)linaro.org> (IBM Corporation) +# - initial API and implementation +# + +# URL : https://wiki.linaro.org/WorkingGroups/PowerManagement/Doc/QA/Scripts#cpuidl… + +source ../include/functions.sh + +CPUIDLE_KILLER=./cpuidle_killer + +if [ $(id -u) != 0 ]; then + log_skip "run as non-root" + exit 0 +fi + +restore_cpus() { + for_each_cpu set_online +} + +check_cpuidle_kill() { + + if [ "$1" = "cpu0" ]; then + log_skip "skipping cpu0" + return 0 + fi + + set_offline $1 + check "cpuidle program runs successfully (120 secs)" "./$CPUIDLE_KILLER" +} + +if [ $(id -u) != 0 ]; then + log_skip "run as non-root" + exit 0 +fi + +trap "restore_cpus; sigtrap" SIGHUP SIGINT SIGTERM + +for_each_cpu check_cpuidle_kill +restore_cpus diff --git a/cpuidle/cpuidle_03.txt b/cpuidle/cpuidle_03.txt new file mode 100644 index 0000000..1bf5c02 --- /dev/null +++ b/cpuidle/cpuidle_03.txt @@ -0,0 +1 @@ +Run a cpuidle program killer and unplug one by one the cpus (except cpu0) diff --git a/cpuidle/cpuidle_killer.c b/cpuidle/cpuidle_killer.c new file mode 100644 index 0000000..67a675e --- /dev/null +++ b/cpuidle/cpuidle_killer.c @@ -0,0 +1,180 @@ +#define _GNU_SOURCE +#include <stdio.h> +#include <stdlib.h> +#include <unistd.h> +#include <sys/timex.h> +#include <sys/types.h> +#include <sys/wait.h> +#include <sys/param.h> +#include <sched.h> +#include <signal.h> + +#define DURATION 120 /* seconds */ +#define SEC_TO_USEC(d) ((d) * 1000 * 1000) + +static int sigon; + +void sighandler(int sig) +{ + sigon = 1; +} + +void timeout(int sig) +{ + printf("Test duration exceeded\n"); + exit(1); +} + +int tick_me(int nrsleeps, int delay, int cpu) +{ + int i; + cpu_set_t mask; + unsigned long counter = 0; + struct itimerval t = { }; + + CPU_ZERO(&mask); + CPU_SET(cpu, &mask); + + /* stick on the specified cpu */ + if (sched_setaffinity(getpid(), sizeof(mask), &mask)) { + fprintf(stderr, "sched_setaffinity (%d): %m", cpu); + return -1; + } + + signal(SIGALRM, sighandler); + + for (i = 0; i < nrsleeps / 2; i++) { + usleep(delay); + + sigon = 0; + t.it_value.tv_sec = 0; + t.it_value.tv_usec = delay; + + if (setitimer(ITIMER_REAL, &t, NULL)) { + perror("setitimer"); + return 1; + } + + while (!sigon) + counter++; + } + + fprintf(stderr, "counter value %lu\n", counter); + + return 0; +} + +int isonline(int cpu) +{ + FILE *f; + char path[MAXPATHLEN]; + int online; + + if (!cpu) + return 1; + + sprintf(path, "/sys/devices/system/cpu/cpu%d/online", cpu); + + f = fopen(path, "r"); + if (!f) { + perror("fopen"); + return -1; + } + + fscanf(f, "%d", &online); + + fclose(f); + + return online; +} + +int main(int argc, char *argv[]) +{ + int ret, i, nrcpus = 2; + int nrsleeps, delay; + pid_t pids[nrcpus]; + struct timex timex = { 0 }; + + if (adjtimex(&timex) < 0) { + perror("adjtimex"); + return 1; + } + + fprintf(stderr, "jiffies are : %ld usecs\n", timex.tick); + + nrcpus = sysconf(_SC_NPROCESSORS_CONF); + if (nrcpus < 0) { + perror("sysconf"); + return 1; + } + + fprintf(stderr, "found %d cpu(s)\n", nrcpus); + + for (i = 0; i < nrcpus; i++) { + + ret = isonline(i); + if (!ret) { + fprintf(stderr, "cpu%d is offline, ignoring\n", i); + continue; + } + + pids[i] = fork(); + if (pids[i] < 0) { + perror("fork"); + return 1; + } + + if (!pids[i]) { + + struct timeval before, after; + long duration; + float deviation; + + nrsleeps = SEC_TO_USEC(DURATION) / (timex.tick * 10); + delay = SEC_TO_USEC(DURATION) / nrsleeps; + + fprintf(stderr, "duration: %d secs, #sleep: %d, delay: %d us\n", + DURATION, nrsleeps, delay); + + gettimeofday(&before, NULL); + if (tick_me(nrsleeps, delay, i)) + return 1; + gettimeofday(&after, NULL); + + duration = SEC_TO_USEC(after.tv_sec - before.tv_sec) + + (after.tv_usec - before.tv_usec); + + fprintf(stderr, "test duration: %f secs\n", + (float)(duration) / (float)SEC_TO_USEC(1)); + + deviation = ((float)duration - (float)SEC_TO_USEC(DURATION)) / + (float)SEC_TO_USEC(DURATION); + + fprintf(stderr, "deviation %f\n", deviation); + if (deviation > 0.5) { + fprintf(stderr, "expected test duration too long\n"); + return 1; + } + + return 0; + } + } + + ret = 0; + + signal(SIGALRM, timeout); + + alarm(DURATION + 5); + + for (i = 0; i < nrcpus; i++) { + int status; + + waitpid(pids[i], &status, 0); + if (status != 0) { + fprintf(stderr, "test for cpu %d has failed\n", i); + ret = 1; + } + } + + return ret; +} diff --git a/include/functions.sh b/include/functions.sh index 1d06249..c39b6b7 100644 --- a/include/functions.sh +++ b/include/functions.sh @@ -179,6 +179,10 @@ set_online() { local cpu=$1 local dirpath=$CPU_PATH/$cpu + if [ "$cpu" = "cpu0" ]; then + return 0 + fi + echo 1 > $dirpath/online } @@ -186,6 +190,10 @@ set_offline() { local cpu=$1 local dirpath=$CPU_PATH/$cpu + if [ "$cpu" = "cpu0" ]; then + return 0 + fi + echo 0 > $dirpath/online } diff --git a/utils/Makefile b/utils/Makefile index 6d2783f..df0b8f4 100644 --- a/utils/Makefile +++ b/utils/Makefile @@ -22,14 +22,4 @@ # - initial API and implementation # -CFLAGS?=-g -Wall -CC?=gcc -SRC=$(wildcard *.c) -EXEC=$(SRC:%.c=%) - -check: $(EXEC) - -all: $(EXEC) - -clean: - rm -f *.o $(EXEC) +include ../Test.mk -- 1.7.5.4

12 years

[PATCH v2] rtc: add support for Freescale SNVS RTC

by Ying-Chun Liu (PaulLiu)

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> This adds an RTC driver for the Low Power (LP) section of SNVS. It hooks into the /dev/rtc interface and supports ioctl to complete RTC features. This driver supports device tree bindings. It only uses the RTC hw in non-secure mode. Signed-off-by: Anish Trivedi <anish(a)freescale.com> Signed-off-by: Eric Miao <eric.miao(a)linaro.org> Signed-off-by: Anson Huang <b20788(a)freescale.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Cc: Alessandro Zummo <a.zummo(a)towertech.it> Cc: Shawn Guo <shawn.guo(a)linaro.org> Cc: Sascha Hauer <s.hauer(a)pengutronix.de> --- Documentation/devicetree/bindings/rtc/snvs-rtc.txt | 18 + drivers/rtc/Kconfig | 10 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-snvs.c | 644 ++++++++++++++++++++ 4 files changed, 673 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/snvs-rtc.txt create mode 100644 drivers/rtc/rtc-snvs.c diff --git a/Documentation/devicetree/bindings/rtc/snvs-rtc.txt b/Documentation/devicetree/bindings/rtc/snvs-rtc.txt new file mode 100644 index 0000000..95b0a75 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/snvs-rtc.txt @@ -0,0 +1,18 @@ +* Freescale SNVS RTC + +Required properties: +- compatible : Should be "fsl,snvs-rtc" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: Two interrupt numbers to the cpu should be specified. First + interrupt number is the consolidated interrupt in non TrustZone. The second + interrupt number is the security interrupt in TrustZone. The number of cells + representing a interrupt depends on the parent interrupt controller. + +Example: + +snvs@020cc000 { + compatible = "fsl,snvs-rtc"; + reg = <0x020cc000 0x4000>; + interrupts = <0 19 0x04 0 20 0x04>; +}; diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 8c8377d..6597ab6 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -641,6 +641,16 @@ config RTC_MXC This driver can also be built as a module, if so, the module will be called "rtc-mxc". +config RTC_DRV_SNVS + tristate "Freescale SNVS Real Time Clock" + depends on ARCH_MXC + help + If you say yes here you get support for the Freescale SNVS + Low Power (LP) RTC module. + + This driver can also be built as a module, if so, the module + will be called "rtc-snvs". + config RTC_DRV_BQ4802 tristate "TI BQ4802" help diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 727ae77..c91042b 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -95,6 +95,7 @@ obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o +obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o obj-$(CONFIG_RTC_DRV_SPEAR) += rtc-spear.o obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o diff --git a/drivers/rtc/rtc-snvs.c b/drivers/rtc/rtc-snvs.c new file mode 100644 index 0000000..a717084 --- /dev/null +++ b/drivers/rtc/rtc-snvs.c @@ -0,0 +1,644 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +/* + * Implementation based on rtc-ds1553.c + */ + +/* + * RTC Real Time Clock (RTC) Driver + * + * Secure Real Time Clock (SRTC) interface in Freescale's SNVS module + * + * This file contains Real Time Clock interface for Linux. The Freescale + * SNVS module's Low Power (LP) SRTC functionality is utilized in this driver, + * in non-secure mode. + */ + +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/rtc.h> +#include <linux/module.h> +#include <linux/fs.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/io.h> +#include <linux/sched.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_address.h> + +/* Register definitions */ +#define SNVS_HPSR 0x14 /* HP Status Register */ +#define SNVS_LPCR 0x38 /* LP Control Register */ +#define SNVS_LPSR 0x4C /* LP Status Register */ +#define SNVS_LPSRTCMR 0x50 /* LP Secure Real Time Counter MSB Register */ +#define SNVS_LPSRTCLR 0x54 /* LP Secure Real Time Counter LSB Register */ +#define SNVS_LPTAR 0x58 /* LP Time Alarm Register */ +#define SNVS_LPSMCMR 0x5C /* LP Secure Monotonic Counter MSB Register */ +#define SNVS_LPSMCLR 0x60 /* LP Secure Monotonic Counter LSB Register */ +#define SNVS_LPPGDR 0x64 /* LP Power Glitch Detector Register */ +#define SNVS_LPGPR 0x68 /* LP General Purpose Register */ + +/* Bit Definitions */ +#define SNVS_HPSR_SSM_ST_MASK 0x00000F00 +#define SNVS_HPSR_SSM_ST_SHIFT 8 + +#define SNVS_LPCR_SRTC_ENV (1 << 0) +#define SNVS_LPCR_LPTA_EN (1 << 1) +#define SNVS_LPCR_LPWUI_EN (1 << 3) +#define SNVS_LPCR_ALL_INT_EN (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN) +#define SNVS_LPSR_LPTA (1 << 0) +#define SNVS_LPPGDR_INIT 0x41736166 + +/* Other defines */ +#define SSM_ST_CHECK 0x9 +#define SSM_ST_NON_SECURE 0xB +#define CNTR_TO_SECS_SH 15 /* Converts 47-bit counter to 32-bit seconds */ + +struct rtc_drv_data { + struct rtc_device *rtc; + void __iomem *ioaddr; + int irq; + bool irq_enable; +}; + +static DEFINE_SPINLOCK(rtc_lock); +static int64_t time_diff; + +/** + * rtc_read_lp_counter() - Read the LP counter + * + * @ioaddr: I/O address of the rtc + * + * LP counter register reads should always use this function. + * This function reads 2 consective times from LP counter register + * until the 2 values match. This is to avoid reading corrupt + * value if the counter is in the middle of updating + */ +static inline u32 rtc_read_lp_counter(void __iomem *ioaddr) +{ + u64 read1, read2; + u32 counter_sec; + + do { + /* MSB */ + read1 = readl(ioaddr + SNVS_LPSRTCMR); + read1 <<= 32; + /* LSB */ + read1 |= readl(ioaddr + SNVS_LPSRTCLR); + + /* MSB */ + read2 = readl(ioaddr + SNVS_LPSRTCMR); + read2 <<= 32; + /* LSB */ + read2 |= readl(ioaddr + SNVS_LPSRTCLR); + } while (read1 != read2); + + /* Convert 47-bit counter to 32-bit raw second count */ + counter_sec = (u32) (read1 >> CNTR_TO_SECS_SH); + + return counter_sec; +} + +/** + * rtc_write_sync_lp() - write data to registers + * + * @ioaddr: I/O address of the rtc + * + * This function does write synchronization for writes to the lp srtc block. + * To take care of the asynchronous CKIL clock, all writes from the IP domain + * will be synchronized to the CKIL domain. + */ +static inline void rtc_write_sync_lp(void __iomem *ioaddr) +{ + unsigned int i, count1, count2, count3; + + /* Wait for 3 CKIL cycles */ + for (i = 0; i < 3; i++) { + /* Do consective reads of LSB of counter to ensure integrity */ + do { + count1 = readl(ioaddr + SNVS_LPSRTCLR); + count2 = readl(ioaddr + SNVS_LPSRTCLR); + } while (count1 != count2); + + /* Now wait until counter value changes */ + do { + do { + count2 = readl(ioaddr + SNVS_LPSRTCLR); + count3 = readl(ioaddr + SNVS_LPSRTCLR); + } while (count2 != count3); + } while (count3 == count1); + } +} + +/** + * rtc_update_alarm() - update RTC alarm registers + * + * @dev: the dev of rtc + * @alrm: the new alarm value to be updated in the RTC + * + * Returns 0 if successful; non-zero otherwise. + * + * This function updates the RTC alarm registers and then clears all the + * interrupt status bits. + */ +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + struct rtc_time alarm_tm, now_tm; + unsigned long now, time, lp_cr; + int ret; + + now = rtc_read_lp_counter(ioaddr); + rtc_time_to_tm(now, &now_tm); + + alarm_tm.tm_year = now_tm.tm_year; + alarm_tm.tm_mon = now_tm.tm_mon; + alarm_tm.tm_mday = now_tm.tm_mday; + + alarm_tm.tm_hour = alrm->tm_hour; + alarm_tm.tm_min = alrm->tm_min; + alarm_tm.tm_sec = alrm->tm_sec; + + rtc_tm_to_time(&now_tm, &now); + rtc_tm_to_time(&alarm_tm, &time); + + if (time < now) { + time += 60 * 60 * 24; + rtc_time_to_tm(time, &alarm_tm); + } + ret = rtc_tm_to_time(&alarm_tm, &time); + + /* Have to clear LPTA_EN before programming new alarm time in LPTAR */ + lp_cr = readl(ioaddr + SNVS_LPCR); + writel(lp_cr & ~SNVS_LPCR_LPTA_EN, ioaddr + SNVS_LPCR); + rtc_write_sync_lp(ioaddr); + + writel(time, ioaddr + SNVS_LPTAR); + + /* clear alarm interrupt status bit */ + writel(SNVS_LPSR_LPTA, ioaddr + SNVS_LPSR); + + return ret; +} + +/** + * snvs_rtc_interrupt() - This function is the RTC interrupt service routine. + * + * @irq: RTC IRQ number + * @dev_id: device ID which is not used + * + * Returns IRQ_HANDLED as defined in the include/linux/interrupt.h file. + */ +static irqreturn_t snvs_rtc_interrupt(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + u32 lp_status, lp_cr; + u32 events = 0; + + lp_status = readl(ioaddr + SNVS_LPSR); + lp_cr = readl(ioaddr + SNVS_LPCR); + + /* update irq data & counter */ + if (lp_status & SNVS_LPSR_LPTA) { + if (lp_cr & SNVS_LPCR_LPTA_EN) + events |= (RTC_AF | RTC_IRQF); + + /* disable further lp alarm interrupts */ + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + } + + /* Update interrupt enables */ + writel(lp_cr, ioaddr + SNVS_LPCR); + + /* If no interrupts are enabled, turn off interrupts in kernel */ + if (((lp_cr & SNVS_LPCR_ALL_INT_EN) == 0) && (pdata->irq_enable)) { + disable_irq_nosync(pdata->irq); + pdata->irq_enable = false; + } + + /* clear interrupt status */ + writel(lp_status, ioaddr + SNVS_LPSR); + + rtc_write_sync_lp(ioaddr); + rtc_update_irq(pdata->rtc, 1, events); + + return IRQ_HANDLED; +} + +/** + * snvs_rtc_read_time() - This function reads the current RTC time into tm + * in Gregorian date. + * + * @tm: contains the RTC time value upon return + * + * Returns 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(rtc_read_lp_counter(ioaddr), tm); + + return 0; +} + +/** + * snvs_rtc_set_time() - This function sets the internal RTC time based on tm + * in Gregorian date. + * + * @tm: the time value to be set in the RTC + * + * Returns 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long time; + int ret; + u32 lp_cr; + u64 old_time_47bit, new_time_47bit; + unsigned long timeout; + + ret = rtc_tm_to_time(tm, &time); + if (ret != 0) + return ret; + + old_time_47bit = (((u64) (readl(ioaddr + SNVS_LPSRTCMR) & + ((0x1 << CNTR_TO_SECS_SH) - 1)) << 32) | + ((u64) readl(ioaddr + SNVS_LPSRTCLR))); + + /* Disable RTC first */ + lp_cr = readl(ioaddr + SNVS_LPCR) & ~SNVS_LPCR_SRTC_ENV; + writel(lp_cr, ioaddr + SNVS_LPCR); + timeout = jiffies + msecs_to_jiffies(3000); + while (readl(ioaddr + SNVS_LPCR) & SNVS_LPCR_SRTC_ENV) { + if (time_after(jiffies, timeout)) { + dev_err(dev, "timeout on temporarily disabling RTC\n"); + return -EBUSY; + } + } + + /* Write 32-bit time to 47-bit timer, leaving 15 LSBs blank */ + writel(time << CNTR_TO_SECS_SH, ioaddr + SNVS_LPSRTCLR); + writel(time >> (32 - CNTR_TO_SECS_SH), ioaddr + SNVS_LPSRTCMR); + + /* Enable RTC again */ + writel(lp_cr | SNVS_LPCR_SRTC_ENV, ioaddr + SNVS_LPCR); + timeout = jiffies + msecs_to_jiffies(3000); + while (!(readl(ioaddr + SNVS_LPCR) & SNVS_LPCR_SRTC_ENV)) { + if (time_after(jiffies, timeout)) { + dev_err(dev, "timeout on enabling RTC back\n"); + return -EBUSY; + } + } + + rtc_write_sync_lp(ioaddr); + + new_time_47bit = (((u64) (readl(ioaddr + SNVS_LPSRTCMR) & + ((0x1 << CNTR_TO_SECS_SH) - 1)) << 32) | + ((u64) readl(ioaddr + SNVS_LPSRTCLR))); + + time_diff = new_time_47bit - old_time_47bit; + + return 0; +} + +/** + * snvs_rtc_read_data() - Read data from RTC + * + * @alrm: contains the RTC alarm value upon return + * + * Returns 0 if successful; non-zero otherwise. + * + * This function reads the current alarm value into the passed in \b alrm + * argument. It updates the \b alrm's pending field value based on the whether + * an alarm interrupt occurs or not. + */ +static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(readl(ioaddr + SNVS_LPTAR), &alrm->time); + alrm->pending = + ((readl(ioaddr + SNVS_LPSR) & SNVS_LPSR_LPTA) != 0) ? 1 : 0; + + return 0; +} + +/** + * snvs_rtc_set_alarm() - This function sets the RTC alarm based on passed + * in alrm. + * + * @alrm: the alarm value to be set in the RTC + * + * Returns 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long lock_flags = 0; + u32 lp_cr; + int ret; + + ret = rtc_valid_tm(&alrm->time); + if (ret) + return ret; + + spin_lock_irqsave(&rtc_lock, lock_flags); + + ret = rtc_update_alarm(dev, &alrm->time); + if (ret) + goto out; + + lp_cr = readl(ioaddr + SNVS_LPCR); + + if (alrm->enabled) + lp_cr |= (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + else + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + + if (lp_cr & SNVS_LPCR_ALL_INT_EN) { + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + } else { + if (pdata->irq_enable) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + writel(lp_cr, ioaddr + SNVS_LPCR); + +out: + rtc_write_sync_lp(ioaddr); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + + return ret; +} + +/** + * snvs_rtc_proc() - provide /proc/driver/rtc file + * + * @seq: buffer to hold the information that the driver wants to write + * + * Returns the number of bytes written into the rtc file. + * + * This function is used to provide the content for the /proc/driver/rtc + * file. + */ +static int snvs_rtc_proc(struct device *dev, struct seq_file *seq) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + seq_printf(seq, "alarm_IRQ\t: %s\n", + (((readl(ioaddr + SNVS_LPCR)) & SNVS_LPCR_LPTA_EN) != + 0) ? "yes" : "no"); + + return 0; +} + +static int snvs_rtc_alarm_irq_enable(struct device *dev, unsigned int enable) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + u32 lp_cr; + unsigned long lock_flags = 0; + + spin_lock_irqsave(&rtc_lock, lock_flags); + + if (enable) { + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + lp_cr = readl(ioaddr + SNVS_LPCR); + lp_cr |= (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + writel(lp_cr, ioaddr + SNVS_LPCR); + } else { + lp_cr = readl(ioaddr + SNVS_LPCR); + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + if (((lp_cr & SNVS_LPCR_ALL_INT_EN) == 0) + && (pdata->irq_enable)) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + writel(lp_cr, ioaddr + SNVS_LPCR); + } + + rtc_write_sync_lp(ioaddr); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + + return 0; +} + +/* The RTC driver structure */ +static struct rtc_class_ops snvs_rtc_ops = { + .read_time = snvs_rtc_read_time, + .set_time = snvs_rtc_set_time, + .read_alarm = snvs_rtc_read_alarm, + .set_alarm = snvs_rtc_set_alarm, + .proc = snvs_rtc_proc, + .alarm_irq_enable = snvs_rtc_alarm_irq_enable, +}; + +/* SNVS RTC Power management control */ +static int __devinit snvs_rtc_probe(struct platform_device *pdev) +{ + struct timespec tv; + struct rtc_device *rtc; + struct rtc_drv_data *pdata = NULL; + void __iomem *ioaddr; + u32 lp_cr; + int ret = 0; + + ioaddr = of_iomap(pdev->dev.of_node, 0); + if (!ioaddr) + return -EADDRNOTAVAIL; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->ioaddr = ioaddr; + + /* Configure and enable the RTC */ + pdata->irq = platform_get_irq(pdev, 0); + if (pdata->irq >= 0) { + if (request_irq(pdata->irq, snvs_rtc_interrupt, IRQF_SHARED, + pdev->name, pdev) < 0) { + dev_warn(&pdev->dev, "interrupt not available.\n"); + pdata->irq = -1; + } else { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + /* initialize glitch detect */ + writel(SNVS_LPPGDR_INIT, ioaddr + SNVS_LPPGDR); + udelay(100); + + /* clear lp interrupt status */ + writel(0xFFFFFFFF, ioaddr + SNVS_LPSR); + + /* Enable RTC */ + lp_cr = readl(ioaddr + SNVS_LPCR); + if ((lp_cr & SNVS_LPCR_SRTC_ENV) == 0) + writel(lp_cr | SNVS_LPCR_SRTC_ENV, ioaddr + SNVS_LPCR); + udelay(100); + + writel(0xFFFFFFFF, ioaddr + SNVS_LPSR); + udelay(100); + + platform_set_drvdata(pdev, pdata); + + rtc = rtc_device_register(pdev->name, &pdev->dev, + &snvs_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) { + ret = PTR_ERR(rtc); + goto err_out; + } + + pdata->rtc = rtc; + + tv.tv_nsec = 0; + tv.tv_sec = rtc_read_lp_counter(ioaddr); + + /* By default, devices should wakeup if they can */ + /* So snvs is set as "should wakeup" as it can */ + device_init_wakeup(&pdev->dev, 1); + + return ret; + +err_out: + iounmap(ioaddr); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + + return ret; +} + +static int __devexit snvs_rtc_remove(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + rtc_device_unregister(pdata->rtc); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + iounmap(pdata->ioaddr); + + return 0; +} + +#ifdef CONFIG_PM +/** + * snvs_rtc_suspend() - handling suspend + * + * @pdev: device descriptor + * @state: power state to enter. + * + * The function always returns 0. + * + * This function is called to save the system time delta relative to + * the SNVS RTC when enterring a low power state. This time delta is + * then used on resume to adjust the system time to account for time + * loss while suspended. + */ +static int snvs_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + disable_irq(pdata->irq); + } + + return 0; +} + +/** + * snvs_rtc_resume() - handling resume + * + * @pdev: device descriptor + * + * The function always returns 0. + * + * This function is called to correct the system time based on the + * current SNVS RTC time relative to the time delta saved during + * suspend. + */ +static int snvs_rtc_resume(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + enable_irq(pdata->irq); + } + + return 0; +} +#endif + +static const struct of_device_id __devinitdata snvs_dt_ids[] = { + { .compatible = "fsl,snvs-rtc" }, + { /* sentinel */ } +}; + +/* Contains pointers to the power management callback functions. */ +static struct platform_driver snvs_rtc_driver = { + .driver = { + .name = "snvs_rtc", + .owner = THIS_MODULE, + .of_match_table = snvs_dt_ids, + }, + .probe = snvs_rtc_probe, + .remove = __exit_p(snvs_rtc_remove), +#ifdef CONFIG_PM + .suspend = snvs_rtc_suspend, + .resume = snvs_rtc_resume, +#endif +}; + +module_platform_driver(snvs_rtc_driver); + +MODULE_AUTHOR("Anish Trivedi <anish(a)freescale.com>, " + "Eric Miao <eric.miao(a)linaro.org>, " + "Anson Huang <b20788(a)freescale.com>, " + "Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>"); +MODULE_DESCRIPTION("SNVS Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:snvs-rtc"); -- 1.7.9.5

12 years

Getting from a CI report to a hardware pack

by Christian Robottom Reis

I think there's a standard link missing from CI pages such as https://ci.linaro.org/jenkins/job/TI-working-tree_tilt-linux-linaro-3.1_pan… to the output directory at http://snapshots.linaro.org/kernel-hwpack/TI-working-tree/TI-working-tree_t… Is that right? For some background, we got this inquiry on IRC: <slado> rsalveti: are there prebuilt linaro kernels for ubuntu that have hdmi fixes described in bug 919378? I went to look at the bug and then figured the latest CI build might have the code included. Indeed it does: https://ci.linaro.org/jenkins/job/TI-working-tree_tilt-linux-linaro-3.1_pan… However, I couldn't find a way of getting the binary generated from the build, and had to actually use my rapidly deteriorating memory to get to snapshots.linaro.org, where I had to also go through a confusing set of directories to get to what I think is the actual build. Thanks, -- Christian Robottom Reis, Engineering VP Brazil (GMT-3) | [+55] 16 9112 6430 | [+1] 612 216 4935 Linaro.org: Open Source Software for ARM SoCs

12 years

[PATCH v4] mfd: da9052: add device-tree support for i2c driver

by Ying-Chun Liu (PaulLiu)

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> This patch adds device-tree support for dialog MFD and the binding documentations. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Cc: Samuel Ortiz <sameo(a)linux.intel.com> Cc: Mark Brown <broonie(a)opensource.wolfsonmicro.com> Cc: Shawn Guo <shawn.guo(a)linaro.org> Cc: Ashish Jangam <ashish.jangam(a)kpitcummins.com> --- .../devicetree/bindings/mfd/da9052-i2c.txt | 60 ++++++++++++++++++++ drivers/mfd/da9052-i2c.c | 50 +++++++++++++--- 2 files changed, 102 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/da9052-i2c.txt diff --git a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt new file mode 100644 index 0000000..1857f4a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt @@ -0,0 +1,60 @@ +* Dialog DA9052/53 Power Management Integrated Circuit (PMIC) + +Required properties: +- compatible : Should be "dlg,da9052", "dlg,da9053-aa", + "dlg,da9053-ab", or "dlg,da9053-bb" + +Sub-nodes: +- regulators : Contain the regulator nodes. The DA9052/53 regulators are + bound using their names as listed below: + + buck0 : regulator BUCK0 + buck1 : regulator BUCK1 + buck2 : regulator BUCK2 + buck3 : regulator BUCK3 + ldo4 : regulator LDO4 + ldo5 : regulator LDO5 + ldo6 : regulator LDO6 + ldo7 : regulator LDO7 + ldo8 : regulator LDO8 + ldo9 : regulator LDO9 + ldo10 : regulator LDO10 + ldo11 : regulator LDO11 + ldo12 : regulator LDO12 + ldo13 : regulator LDO13 + + The bindings details of individual regulator device can be found in: + Documentation/devicetree/bindings/regulator/regulator.txt + +Examples: + +i2c@63fc8000 { /* I2C1 */ + status = "okay"; + + pmic: dialog@48 { + compatible = "dlg,da9053-aa"; + reg = <0x48>; + + regulators { + buck0 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck2 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + + buck3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + }; + }; +}; diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index 36b88e3..d8abdb3 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -22,6 +22,11 @@ #include <linux/mfd/da9052/da9052.h> #include <linux/mfd/da9052/reg.h> +#ifdef CONFIG_OF +#include <linux/of.h> +#include <linux/of_device.h> +#endif + static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) { int reg_val, ret; @@ -41,6 +46,24 @@ static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) return 0; } +static struct i2c_device_id da9052_i2c_id[] = { + {"da9052", DA9052}, + {"da9053-aa", DA9053_AA}, + {"da9053-ba", DA9053_BA}, + {"da9053-bb", DA9053_BB}, + {} +}; + +#ifdef CONFIG_OF +static const struct of_device_id dialog_dt_ids[] = { + { .compatible = "dlg,da9052", .data = &da9052_i2c_id[0] }, + { .compatible = "dlg,da9053-aa", .data = &da9052_i2c_id[1] }, + { .compatible = "dlg,da9053-ab", .data = &da9052_i2c_id[2] }, + { .compatible = "dlg,da9053-bb", .data = &da9052_i2c_id[3] }, + { /* sentinel */ } +}; +#endif + static int __devinit da9052_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -76,6 +99,22 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, if (ret < 0) goto err_regmap; +#ifdef CONFIG_OF + if (!id) { + struct device_node *np = client->dev.of_node; + const struct of_device_id *deviceid; + + deviceid = of_match_node(np, dialog_dt_ids); + id = (const struct i2c_device_id *)deviceid->data; + } +#endif + + if (!id) { + ret = -ENODEV; + dev_err(&client->dev, "id is null.\n"); + goto err_regmap; + } + ret = da9052_device_init(da9052, id->driver_data); if (ret != 0) goto err_regmap; @@ -100,14 +139,6 @@ static int __devexit da9052_i2c_remove(struct i2c_client *client) return 0; } -static struct i2c_device_id da9052_i2c_id[] = { - {"da9052", DA9052}, - {"da9053-aa", DA9053_AA}, - {"da9053-ba", DA9053_BA}, - {"da9053-bb", DA9053_BB}, - {} -}; - static struct i2c_driver da9052_i2c_driver = { .probe = da9052_i2c_probe, .remove = __devexit_p(da9052_i2c_remove), @@ -115,6 +146,9 @@ static struct i2c_driver da9052_i2c_driver = { .driver = { .name = "da9052", .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = dialog_dt_ids, +#endif }, }; -- 1.7.9.5

12 years

Re: Thermal release for this month.

by Amit Kucheria

Adding Guodong and Tushar to make sure that the LT trees also have thermal management turned on for 12.04. And cc'ing linaro-dev and the release manager. :) /Amit On Fri, Apr 13, 2012 at 4:47 PM, Amit Kachhap <amit.kachhap(a)linaro.org> wrote: > Hi Andrey, > > Please pull the thermal management work for exynos4 and imx6 platforms > for this month release. > > git://git.linaro.org/people/amitdanielk/linux.git thermal_exynos4_imx6_work > > since commit id 258f742635360175564e9470eb060ff4d4b984e7 > > The necessary configs to be enabled are, > https://wiki.linaro.org/WorkingGroups/PowerManagement/Doc/Kconfig#Thermal > > Thanks, > Amit Daniel

12 years

error occurring in qemu-linaro revisions pulled since March 30th

by Russell Keith Davis

The only thing that changed in my setup, Virtualbox, scratchbox2, arm debian rootfs & qemu-linaro is that i pulled a newer version than march 30th and i went from some expected errors http://pastebin.com/QTt8S9kT to http://pastebin.com/2SRJRvdp not really sure where to even start tracking it down other than comparing a last known working version, git pulled on March 30th with one that doesn't anything since April 1st. bst rgrds Russell

12 years

[PATCH v3] mfd: da9052: add device-tree support for i2c driver

by Ying-Chun Liu (PaulLiu)

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> This patch adds device-tree support for dialog MFD and the binding documentations. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Cc: Samuel Ortiz <sameo(a)linux.intel.com> Cc: Mark Brown <broonie(a)opensource.wolfsonmicro.com> Cc: Shawn Guo <shawn.guo(a)linaro.org> Cc: Ashish Jangam <ashish.jangam(a)kpitcummins.com> --- .../devicetree/bindings/mfd/da9052-i2c.txt | 60 ++++++++++++++++++++ drivers/mfd/da9052-i2c.c | 51 ++++++++++++++--- 2 files changed, 103 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/mfd/da9052-i2c.txt diff --git a/Documentation/devicetree/bindings/mfd/da9052-i2c.txt b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt new file mode 100644 index 0000000..1857f4a --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/da9052-i2c.txt @@ -0,0 +1,60 @@ +* Dialog DA9052/53 Power Management Integrated Circuit (PMIC) + +Required properties: +- compatible : Should be "dlg,da9052", "dlg,da9053-aa", + "dlg,da9053-ab", or "dlg,da9053-bb" + +Sub-nodes: +- regulators : Contain the regulator nodes. The DA9052/53 regulators are + bound using their names as listed below: + + buck0 : regulator BUCK0 + buck1 : regulator BUCK1 + buck2 : regulator BUCK2 + buck3 : regulator BUCK3 + ldo4 : regulator LDO4 + ldo5 : regulator LDO5 + ldo6 : regulator LDO6 + ldo7 : regulator LDO7 + ldo8 : regulator LDO8 + ldo9 : regulator LDO9 + ldo10 : regulator LDO10 + ldo11 : regulator LDO11 + ldo12 : regulator LDO12 + ldo13 : regulator LDO13 + + The bindings details of individual regulator device can be found in: + Documentation/devicetree/bindings/regulator/regulator.txt + +Examples: + +i2c@63fc8000 { /* I2C1 */ + status = "okay"; + + pmic: dialog@48 { + compatible = "dlg,da9053-aa"; + reg = <0x48>; + + regulators { + buck0 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck1 { + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + }; + + buck2 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + + buck3 { + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + }; + }; + }; +}; diff --git a/drivers/mfd/da9052-i2c.c b/drivers/mfd/da9052-i2c.c index 36b88e3..b946b0ff 100644 --- a/drivers/mfd/da9052-i2c.c +++ b/drivers/mfd/da9052-i2c.c @@ -22,6 +22,11 @@ #include <linux/mfd/da9052/da9052.h> #include <linux/mfd/da9052/reg.h> +#ifdef CONFIG_OF +#include <linux/of.h> +#include <linux/of_device.h> +#endif + static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) { int reg_val, ret; @@ -41,6 +46,24 @@ static int da9052_i2c_enable_multiwrite(struct da9052 *da9052) return 0; } +static struct i2c_device_id da9052_i2c_id[] = { + {"da9052", DA9052}, + {"da9053-aa", DA9053_AA}, + {"da9053-ba", DA9053_BA}, + {"da9053-bb", DA9053_BB}, + {} +}; + +#ifdef CONFIG_OF +static const struct of_device_id dialog_dt_ids[] = { + { .compatible = "dlg,da9052", .data = &da9052_i2c_id[0] }, + { .compatible = "dlg,da9053-aa", .data = &da9052_i2c_id[1] }, + { .compatible = "dlg,da9053-ab", .data = &da9052_i2c_id[2] }, + { .compatible = "dlg,da9053-bb", .data = &da9052_i2c_id[3] }, + { /* sentinel */ } +}; +#endif + static int __devinit da9052_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -76,6 +99,23 @@ static int __devinit da9052_i2c_probe(struct i2c_client *client, if (ret < 0) goto err_regmap; +#ifdef CONFIG_OF + if (!id) { + int i; + struct device_node *np = client->dev.of_node; + const struct of_device_id *deviceid; + + deviceid = of_match_node(np, dialog_dt_ids); + id = (const struct i2c_device_id *)(deviceid->data); + } +#endif + + if (!id) { + ret = -ENODEV; + dev_err(&client->dev, "id is null.\n"); + goto err_regmap; + } + ret = da9052_device_init(da9052, id->driver_data); if (ret != 0) goto err_regmap; @@ -100,14 +140,6 @@ static int __devexit da9052_i2c_remove(struct i2c_client *client) return 0; } -static struct i2c_device_id da9052_i2c_id[] = { - {"da9052", DA9052}, - {"da9053-aa", DA9053_AA}, - {"da9053-ba", DA9053_BA}, - {"da9053-bb", DA9053_BB}, - {} -}; - static struct i2c_driver da9052_i2c_driver = { .probe = da9052_i2c_probe, .remove = __devexit_p(da9052_i2c_remove), @@ -115,6 +147,9 @@ static struct i2c_driver da9052_i2c_driver = { .driver = { .name = "da9052", .owner = THIS_MODULE, +#ifdef CONFIG_OF + .of_match_table = dialog_dt_ids, +#endif }, }; -- 1.7.9.5

12 years

[PATCH] rtc: add support for Freescale SNVS RTC

by Ying-Chun Liu (PaulLiu)

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> This adds an RTC driver for the Low Power (LP) section of SNVS. It hooks into the /dev/rtc interface and supports ioctl to complete RTC features. This driver supports device tree bindings. It only uses the RTC hw in non-secure mode. Signed-off-by: Anish Trivedi <anish(a)freescale.com> Signed-off-by: Eric Miao <eric.miao(a)linaro.org> Signed-off-by: Anson Huang <b20788(a)freescale.com> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Cc: Alessandro Zummo <a.zummo(a)towertech.it> Cc: Shawn Guo <shawn.guo(a)linaro.org> --- drivers/rtc/Kconfig | 11 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-snvs.c | 737 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 749 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/rtc-snvs.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 3a125b8..d58f4b7 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -634,6 +634,17 @@ config RTC_MXC This driver can also be built as a module, if so, the module will be called "rtc-mxc". +config RTC_DRV_SNVS + tristate "Freescale SNVS Real Time Clock" + depends on ARCH_MXC + depends on RTC_CLASS + help + If you say yes here you get support for the Freescale SNVS + Low Power (LP) RTC module. + + This driver can also be built as a module, if so, the module + will be called "rtc-snvs". + config RTC_DRV_BQ4802 tristate "TI BQ4802" help diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 6e69823..8b30686 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -93,6 +93,7 @@ obj-$(CONFIG_RTC_DRV_S35390A) += rtc-s35390a.o obj-$(CONFIG_RTC_DRV_S3C) += rtc-s3c.o obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o +obj-$(CONFIG_RTC_DRV_SNVS) += rtc-snvs.o obj-$(CONFIG_RTC_DRV_SPEAR) += rtc-spear.o obj-$(CONFIG_RTC_DRV_STARFIRE) += rtc-starfire.o obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o diff --git a/drivers/rtc/rtc-snvs.c b/drivers/rtc/rtc-snvs.c new file mode 100644 index 0000000..49ac8a5 --- /dev/null +++ b/drivers/rtc/rtc-snvs.c @@ -0,0 +1,737 @@ +/* + * Copyright (C) 2011 Freescale Semiconductor, Inc. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +/* + * Implementation based on rtc-ds1553.c + */ + +/*! + * @defgroup RTC Real Time Clock (RTC) Driver + */ +/*! + * @file rtc-snvs.c + * @brief Secure Real Time Clock (SRTC) interface in Freescale's SNVS module + * + * This file contains Real Time Clock interface for Linux. The Freescale + * SNVS module's Low Power (LP) SRTC functionality is utilized in this driver, + * in non-secure mode. + * + * @ingroup RTC + */ + +#include <linux/slab.h> +#include <linux/delay.h> +#include <linux/rtc.h> +#include <linux/module.h> +#include <linux/fs.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/io.h> +#include <linux/sched.h> +#include <linux/of.h> +#include <linux/of_device.h> + +/* Register definitions */ +#define SNVS_HPSR 0x14 /* HP Status Register */ +#define SNVS_LPCR 0x38 /* LP Control Register */ +#define SNVS_LPSR 0x4C /* LP Status Register */ +#define SNVS_LPSRTCMR 0x50 /* LP Secure Real Time Counter MSB Register */ +#define SNVS_LPSRTCLR 0x54 /* LP Secure Real Time Counter LSB Register */ +#define SNVS_LPTAR 0x58 /* LP Time Alarm Register */ +#define SNVS_LPSMCMR 0x5C /* LP Secure Monotonic Counter MSB Register */ +#define SNVS_LPSMCLR 0x60 /* LP Secure Monotonic Counter LSB Register */ +#define SNVS_LPPGDR 0x64 /* LP Power Glitch Detector Register */ +#define SNVS_LPGPR 0x68 /* LP General Purpose Register */ + +/* Bit Definitions */ +#define SNVS_HPSR_SSM_ST_MASK 0x00000F00 +#define SNVS_HPSR_SSM_ST_SHIFT 8 + +#define SNVS_LPCR_SRTC_ENV (1 << 0) +#define SNVS_LPCR_LPTA_EN (1 << 1) +#define SNVS_LPCR_LPWUI_EN (1 << 3) +#define SNVS_LPCR_ALL_INT_EN (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN) +#define SNVS_LPSR_LPTA (1 << 0) +#define SNVS_LPPGDR_INIT 0x41736166 + +/* Other defines */ +#define SSM_ST_CHECK 0x9 +#define SSM_ST_NON_SECURE 0xB +#define CNTR_TO_SECS_SH 15 /* Converts 47-bit counter to 32-bit seconds */ + +#define RTC_READ_TIME_47BIT _IOR('p', 0x20, unsigned long long) +/* blocks until LPSCMR is set, returns difference */ +#define RTC_WAIT_TIME_SET _IOR('p', 0x21, int64_t) + +struct rtc_drv_data { + struct rtc_device *rtc; + void __iomem *ioaddr; + int irq; + bool irq_enable; +}; + +static unsigned long rtc_status; + +static DEFINE_SPINLOCK(rtc_lock); +DECLARE_COMPLETION(snvs_completion); +static int64_t time_diff; + +/*! + * LP counter register reads should always use this function. + * This function reads 2 consective times from LP counter register + * until the 2 values match. This is to avoid reading corrupt + * value if the counter is in the middle of updating + */ +static inline u32 rtc_read_lp_counter(void __iomem *counter_reg) +{ + u64 read1, read2; + u32 counter_sec; + + do { + /* MSB */ + read1 = readl(counter_reg); + read1 <<= 32; + /* LSB */ + read1 |= readl(counter_reg + 4); + + /* MSB */ + read2 = readl(counter_reg); + read2 <<= 32; + /* LSB */ + read2 |= readl(counter_reg + 4); + } while (read1 != read2); + + /* Convert 47-bit counter to 32-bit raw second count */ + counter_sec = (u32) (read1 >> CNTR_TO_SECS_SH); + + return counter_sec; +} + +/*! + * This function does write synchronization for writes to the lp srtc block. + * To take care of the asynchronous CKIL clock, all writes from the IP domain + * will be synchronized to the CKIL domain. + */ +static inline void rtc_write_sync_lp(void __iomem *ioaddr) +{ + unsigned int i, count1, count2, count3; + + /* Wait for 3 CKIL cycles */ + for (i = 0; i < 3; i++) { + + /* Do consective reads of LSB of counter to ensure integrity */ + do { + count1 = readl(ioaddr + SNVS_LPSRTCLR); + count2 = readl(ioaddr + SNVS_LPSRTCLR); + } while (count1 != count2); + + /* Now wait until counter value changes */ + do { + do { + count2 = readl(ioaddr + SNVS_LPSRTCLR); + count3 = readl(ioaddr + SNVS_LPSRTCLR); + } while (count2 != count3); + } while (count3 == count1); + } +} + +/*! + * This function updates the RTC alarm registers and then clears all the + * interrupt status bits. + * + * @param alrm the new alarm value to be updated in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + struct rtc_time alarm_tm, now_tm; + unsigned long now, time, lp_cr; + int ret; + + now = rtc_read_lp_counter(ioaddr + SNVS_LPSRTCMR); + rtc_time_to_tm(now, &now_tm); + + alarm_tm.tm_year = now_tm.tm_year; + alarm_tm.tm_mon = now_tm.tm_mon; + alarm_tm.tm_mday = now_tm.tm_mday; + + alarm_tm.tm_hour = alrm->tm_hour; + alarm_tm.tm_min = alrm->tm_min; + alarm_tm.tm_sec = alrm->tm_sec; + + rtc_tm_to_time(&now_tm, &now); + rtc_tm_to_time(&alarm_tm, &time); + + if (time < now) { + time += 60 * 60 * 24; + rtc_time_to_tm(time, &alarm_tm); + } + ret = rtc_tm_to_time(&alarm_tm, &time); + + /* Have to clear LPTA_EN before programming new alarm time in LPTAR */ + lp_cr = readl(ioaddr + SNVS_LPCR); + writel(lp_cr & ~SNVS_LPCR_LPTA_EN, ioaddr + SNVS_LPCR); + rtc_write_sync_lp(ioaddr); + + writel(time, ioaddr + SNVS_LPTAR); + + /* clear alarm interrupt status bit */ + writel(SNVS_LPSR_LPTA, ioaddr + SNVS_LPSR); + + return ret; +} + +/*! + * This function is the RTC interrupt service routine. + * + * @param irq RTC IRQ number + * @param dev_id device ID which is not used + * + * @return IRQ_HANDLED as defined in the include/linux/interrupt.h file. + */ +static irqreturn_t snvs_rtc_interrupt(int irq, void *dev_id) +{ + struct platform_device *pdev = dev_id; + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + void __iomem *ioaddr = pdata->ioaddr; + u32 lp_status, lp_cr; + u32 events = 0; + + lp_status = readl(ioaddr + SNVS_LPSR); + lp_cr = readl(ioaddr + SNVS_LPCR); + + /* update irq data & counter */ + if (lp_status & SNVS_LPSR_LPTA) { + if (lp_cr & SNVS_LPCR_LPTA_EN) + events |= (RTC_AF | RTC_IRQF); + + /* disable further lp alarm interrupts */ + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + } + + /* Update interrupt enables */ + writel(lp_cr, ioaddr + SNVS_LPCR); + + /* If no interrupts are enabled, turn off interrupts in kernel */ + if (((lp_cr & SNVS_LPCR_ALL_INT_EN) == 0) && (pdata->irq_enable)) { + disable_irq_nosync(pdata->irq); + pdata->irq_enable = false; + } + + /* clear interrupt status */ + writel(lp_status, ioaddr + SNVS_LPSR); + + rtc_write_sync_lp(ioaddr); + rtc_update_irq(pdata->rtc, 1, events); + + return IRQ_HANDLED; +} + +/*! + * This function is used to open the RTC driver. + * + * @return 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_open(struct device *dev) +{ + if (test_and_set_bit(1, &rtc_status)) + return -EBUSY; + + return 0; +} + +/*! + * clear all interrupts and release the IRQ + */ +static void snvs_rtc_release(struct device *dev) +{ + rtc_status = 0; +} + +/*! + * This function reads the current RTC time into tm in Gregorian date. + * + * @param tm contains the RTC time value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(rtc_read_lp_counter(ioaddr + SNVS_LPSRTCMR), tm); + + return 0; +} + +/*! + * This function sets the internal RTC time based on tm in Gregorian date. + * + * @param tm the time value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long time; + int ret; + u32 lp_cr; + u64 old_time_47bit, new_time_47bit; + + ret = rtc_tm_to_time(tm, &time); + if (ret != 0) + return ret; + + old_time_47bit = (((u64) (readl(ioaddr + SNVS_LPSRTCMR) & + ((0x1 << CNTR_TO_SECS_SH) - 1)) << 32) | + ((u64) readl(ioaddr + SNVS_LPSRTCLR))); + + /* Disable RTC first */ + lp_cr = readl(ioaddr + SNVS_LPCR) & ~SNVS_LPCR_SRTC_ENV; + writel(lp_cr, ioaddr + SNVS_LPCR); + while (readl(ioaddr + SNVS_LPCR) & SNVS_LPCR_SRTC_ENV) + ; + + /* Write 32-bit time to 47-bit timer, leaving 15 LSBs blank */ + writel(time << CNTR_TO_SECS_SH, ioaddr + SNVS_LPSRTCLR); + writel(time >> (32 - CNTR_TO_SECS_SH), ioaddr + SNVS_LPSRTCMR); + + /* Enable RTC again */ + writel(lp_cr | SNVS_LPCR_SRTC_ENV, ioaddr + SNVS_LPCR); + while (!(readl(ioaddr + SNVS_LPCR) & SNVS_LPCR_SRTC_ENV)) + ; + + rtc_write_sync_lp(ioaddr); + + new_time_47bit = (((u64) (readl(ioaddr + SNVS_LPSRTCMR) & + ((0x1 << CNTR_TO_SECS_SH) - 1)) << 32) | + ((u64) readl(ioaddr + SNVS_LPSRTCLR))); + + time_diff = new_time_47bit - old_time_47bit; + + /* signal all waiting threads that time changed */ + complete_all(&snvs_completion); + + /* allow signalled threads to handle the time change notification */ + schedule(); + + /* reinitialize completion variable */ + INIT_COMPLETION(snvs_completion); + + return 0; +} + +/*! + * This function reads the current alarm value into the passed in \b alrm + * argument. It updates the \b alrm's pending field value based on the whether + * an alarm interrupt occurs or not. + * + * @param alrm contains the RTC alarm value upon return + * + * @return 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + rtc_time_to_tm(readl(ioaddr + SNVS_LPTAR), &alrm->time); + alrm->pending = + ((readl(ioaddr + SNVS_LPSR) & SNVS_LPSR_LPTA) != 0) ? 1 : 0; + + return 0; +} + +/*! + * This function sets the RTC alarm based on passed in alrm. + * + * @param alrm the alarm value to be set in the RTC + * + * @return 0 if successful; non-zero otherwise. + */ +static int snvs_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + unsigned long lock_flags = 0; + u32 lp_cr; + int ret; + + if (rtc_valid_tm(&alrm->time)) { + if (alrm->time.tm_sec > 59 || + alrm->time.tm_hour > 23 || alrm->time.tm_min > 59) { + return -EINVAL; + } + } + + spin_lock_irqsave(&rtc_lock, lock_flags); + + ret = rtc_update_alarm(dev, &alrm->time); + if (ret) + goto out; + + lp_cr = readl(ioaddr + SNVS_LPCR); + + if (alrm->enabled) + lp_cr |= (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + else + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + + if (lp_cr & SNVS_LPCR_ALL_INT_EN) { + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + } else { + if (pdata->irq_enable) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + writel(lp_cr, ioaddr + SNVS_LPCR); + +out: + rtc_write_sync_lp(ioaddr); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + + return ret; +} + +/*! + * This function is used to provide the content for the /proc/driver/rtc + * file. + * + * @param seq buffer to hold the information that the driver wants to write + * + * @return The number of bytes written into the rtc file. + */ +static int snvs_rtc_proc(struct device *dev, struct seq_file *seq) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + + seq_printf(seq, "alarm_IRQ\t: %s\n", + (((readl(ioaddr + SNVS_LPCR)) & SNVS_LPCR_LPTA_EN) != + 0) ? "yes" : "no"); + + return 0; +} + +static int snvs_rtc_alarm_irq_enable(struct device *dev, unsigned int enable) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + u32 lp_cr; + unsigned long lock_flags = 0; + + spin_lock_irqsave(&rtc_lock, lock_flags); + + if (enable) { + if (!pdata->irq_enable) { + enable_irq(pdata->irq); + pdata->irq_enable = true; + } + lp_cr = readl(ioaddr + SNVS_LPCR); + lp_cr |= (SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + writel(lp_cr, ioaddr + SNVS_LPCR); + } else { + lp_cr = readl(ioaddr + SNVS_LPCR); + lp_cr &= ~(SNVS_LPCR_LPTA_EN | SNVS_LPCR_LPWUI_EN); + if (((lp_cr & SNVS_LPCR_ALL_INT_EN) == 0) + && (pdata->irq_enable)) { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + writel(lp_cr, ioaddr + SNVS_LPCR); + } + + rtc_write_sync_lp(ioaddr); + spin_unlock_irqrestore(&rtc_lock, lock_flags); + + return 0; +} + +/*! + * This function is used to support some ioctl calls directly. + * Other ioctl calls are supported indirectly through the + * arm/common/rtctime.c file. + * + * @param cmd ioctl command as defined in include/linux/rtc.h + * @param arg value for the ioctl command + * + * @return 0 if successful or negative value otherwise. + */ +static int snvs_rtc_ioctl(struct device *dev, unsigned int cmd, + unsigned long arg) +{ + struct rtc_drv_data *pdata = dev_get_drvdata(dev); + void __iomem *ioaddr = pdata->ioaddr; + u64 time_47bit; + int retVal; + + switch (cmd) { + case RTC_READ_TIME_47BIT: + time_47bit = (((u64) (readl(ioaddr + SNVS_LPSRTCMR) & + ((0x1 << CNTR_TO_SECS_SH) - 1)) << 32) | + ((u64) readl(ioaddr + SNVS_LPSRTCLR))); + + if (arg && copy_to_user((u64 *) arg, &time_47bit, sizeof(u64))) + return -EFAULT; + + return 0; + + /* This IOCTL to be used by processes to be notified of time changes */ + case RTC_WAIT_TIME_SET: + /* don't block without releasing mutex first */ + mutex_unlock(&pdata->rtc->ops_lock); + + /* sleep till awakened by SRTC driver when LPSCMR is changed */ + wait_for_completion(&snvs_completion); + + /* relock mutex because rtc_dev_ioctl will unlock again */ + retVal = mutex_lock_interruptible(&pdata->rtc->ops_lock); + + /* copy the new time difference = new time - previous time + * to the user param. The difference is a signed value */ + if (arg && copy_to_user((int64_t *) arg, &time_diff, + sizeof(int64_t))) + return -EFAULT; + + return retVal; + + } + + return -ENOIOCTLCMD; +} + +/*! + * The RTC driver structure + */ +static struct rtc_class_ops snvs_rtc_ops = { + .open = snvs_rtc_open, + .release = snvs_rtc_release, + .read_time = snvs_rtc_read_time, + .set_time = snvs_rtc_set_time, + .read_alarm = snvs_rtc_read_alarm, + .set_alarm = snvs_rtc_set_alarm, + .proc = snvs_rtc_proc, + .ioctl = snvs_rtc_ioctl, + .alarm_irq_enable = snvs_rtc_alarm_irq_enable, +}; + +/*! SNVS RTC Power management control */ +static int __devinit snvs_rtc_probe(struct platform_device *pdev) +{ + struct timespec tv; + struct resource *res; + struct rtc_device *rtc; + struct rtc_drv_data *pdata = NULL; + void __iomem *ioaddr; + u32 lp_cr; + int ret = 0; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return -ENODEV; + + ioaddr = ioremap(res->start, resource_size(res)); + if (!ioaddr) + return -EADDRNOTAVAIL; + + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); + if (!pdata) + return -ENOMEM; + + pdata->ioaddr = ioaddr; + + /* Configure and enable the RTC */ + pdata->irq = platform_get_irq(pdev, 0); + if (pdata->irq >= 0) { + if (request_irq(pdata->irq, snvs_rtc_interrupt, IRQF_SHARED, + pdev->name, pdev) < 0) { + dev_warn(&pdev->dev, "interrupt not available.\n"); + pdata->irq = -1; + } else { + disable_irq(pdata->irq); + pdata->irq_enable = false; + } + } + + /* initialize glitch detect */ + writel(SNVS_LPPGDR_INIT, ioaddr + SNVS_LPPGDR); + udelay(100); + + /* clear lp interrupt status */ + writel(0xFFFFFFFF, ioaddr + SNVS_LPSR); + + /* Enable RTC */ + lp_cr = readl(ioaddr + SNVS_LPCR); + if ((lp_cr & SNVS_LPCR_SRTC_ENV) == 0) + writel(lp_cr | SNVS_LPCR_SRTC_ENV, ioaddr + SNVS_LPCR); + + udelay(100); + + writel(0xFFFFFFFF, ioaddr + SNVS_LPSR); + udelay(100); + + platform_set_drvdata(pdev, pdata); + + rtc = rtc_device_register(pdev->name, &pdev->dev, + &snvs_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc)) { + ret = PTR_ERR(rtc); + goto err_out; + } + + pdata->rtc = rtc; + + tv.tv_nsec = 0; + tv.tv_sec = rtc_read_lp_counter(ioaddr + SNVS_LPSRTCMR); + + /* By default, devices should wakeup if they can */ + /* So snvs is set as "should wakeup" as it can */ + device_init_wakeup(&pdev->dev, 1); + + return ret; + +err_out: + iounmap(ioaddr); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + + return ret; +} + +static int __devexit snvs_rtc_remove(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + rtc_device_unregister(pdata->rtc); + if (pdata->irq >= 0) + free_irq(pdata->irq, pdev); + iounmap(pdata->ioaddr); + + return 0; +} + +/*! + * This function is called to save the system time delta relative to + * the SNVS RTC when enterring a low power state. This time delta is + * then used on resume to adjust the system time to account for time + * loss while suspended. + * + * @param pdev not used + * @param state Power state to enter. + * + * @return The function always returns 0. + */ +static int snvs_rtc_suspend(struct platform_device *pdev, pm_message_t state) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + enable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + disable_irq(pdata->irq); + } + + return 0; +} + +/*! + * This function is called to correct the system time based on the + * current SNVS RTC time relative to the time delta saved during + * suspend. + * + * @param pdev not used + * + * @return The function always returns 0. + */ +static int snvs_rtc_resume(struct platform_device *pdev) +{ + struct rtc_drv_data *pdata = platform_get_drvdata(pdev); + + if (device_may_wakeup(&pdev->dev)) { + disable_irq_wake(pdata->irq); + } else { + if (pdata->irq_enable) + enable_irq(pdata->irq); + } + + return 0; +} + +static const struct of_device_id __devinitdata snvs_dt_ids[] = { + { .compatible = "fsl,snvs" }, + { /* sentinel */ } +}; + +/*! + * Contains pointers to the power management callback functions. + */ +static struct platform_driver snvs_rtc_driver = { + .driver = { + .name = "snvs_rtc", + .owner = THIS_MODULE, + .of_match_table = snvs_dt_ids, + }, + .probe = snvs_rtc_probe, + .remove = __exit_p(snvs_rtc_remove), + .suspend = snvs_rtc_suspend, + .resume = snvs_rtc_resume, +}; + +/*! + * This function creates the /proc/driver/rtc file and registers the device RTC + * in the /dev/misc directory. It also reads the RTC value from external source + * and setup the internal RTC properly. + * + * @return -1 if RTC is failed to initialize; 0 is successful. + */ +static int __init snvs_rtc_init(void) +{ + return platform_driver_register(&snvs_rtc_driver); +} +module_init(snvs_rtc_init); + +/*! + * This function removes the /proc/driver/rtc file and un-registers the + * device RTC from the /dev/misc directory. + */ +static void __exit snvs_rtc_exit(void) +{ + platform_driver_unregister(&snvs_rtc_driver); +} +module_exit(snvs_rtc_exit); + +MODULE_AUTHOR("Anish Trivedi <anish(a)freescale.com>, " + "Eric Miao <eric.miao(a)linaro.org>, " + "Anson Huang <b20788(a)freescale.com>, " + "Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org>"); +MODULE_DESCRIPTION("SNVS Realtime Clock Driver (RTC)"); +MODULE_LICENSE("GPL v2"); -- 1.7.9.1

12 years

Linaro 12.04 3.4-rc1 based androidization branch is available

by John Stultz

I went ahead and forward ported the AOSP-3.3 tree to 3.4-rc1. You can grab it here: git://git.linaro.org/people/jstultz/android.git linaro-android-3.4-jstultz-rebase thanks -john

12 years

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linaro-dev April 2012