linaro-dev April 2012

linaro-dev@lists.linaro.org

113 participants
85 discussions

[PATCH][V2] cpuidle : use percpu cpuidle in the core code

by Daniel Lezcano

The usual cpuidle initialization routines are to register the driver, then register a cpuidle device per cpu. With the device's state count default initialization with the driver's state count, the code initialization remains mostly the same in the different drivers. We can then add a new function 'cpuidle_register' where we register the driver and the devices. These devices can be defined in a global static variable in cpuidle.c. We will be able to factor out and remove a lot of duplicate lines of code. As we still have some drivers, with different initialization routines, we keep 'cpuidle_register_driver' and 'cpuidle_register_device' as low level initialization routines to do some specific operations on the cpuidle devices. Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- drivers/cpuidle/cpuidle.c | 42 ++++++++++++++++++++++++++++++++++++++++++ include/linux/cpuidle.h | 3 +++ 2 files changed, 45 insertions(+), 0 deletions(-) diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c index 87411ce..151c55a 100644 --- a/drivers/cpuidle/cpuidle.c +++ b/drivers/cpuidle/cpuidle.c @@ -23,6 +23,7 @@ #include "cpuidle.h" DEFINE_PER_CPU(struct cpuidle_device *, cpuidle_devices); +DEFINE_PER_CPU(struct cpuidle_device, cpuidle_device); DEFINE_MUTEX(cpuidle_lock); LIST_HEAD(cpuidle_detected_devices); @@ -419,6 +420,47 @@ int cpuidle_register_device(struct cpuidle_device *dev) EXPORT_SYMBOL_GPL(cpuidle_register_device); +/* + * cpuidle_register : register cpuidle driver and devices + * Note this function must be called after smp_init. + * @drv : the cpuidle driver + * Returns 0 on success, < 0 otherwise + */ +int cpuidle_register(struct cpuidle_driver *drv) +{ + int ret, cpu, i; + struct cpuidle_device *dev; + + ret = cpuidle_register_driver(drv); + if (ret) + return ret; + + for_each_online_cpu(cpu) { + dev = &per_cpu(cpuidle_device, cpu); + dev->cpu = cpu; + + ret = cpuidle_register_device(dev); + if (ret) + goto out_unregister; + } + +out: + return ret; + +out_unregister: + for_each_online_cpu(i) { + if (i == cpu) + break; + dev = &per_cpu(cpuidle_device, cpu); + cpuidle_unregister_device(dev); + } + + cpuidle_unregister_driver(drv); + + goto out; +} +EXPORT_SYMBOL_GPL(cpuidle_register); + /** * cpuidle_unregister_device - unregisters a CPU's idle PM feature * @dev: the cpu diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h index 6c26a3d..3475294 100644 --- a/include/linux/cpuidle.h +++ b/include/linux/cpuidle.h @@ -135,6 +135,7 @@ struct cpuidle_driver { #ifdef CONFIG_CPU_IDLE extern void disable_cpuidle(void); extern int cpuidle_idle_call(void); +extern int cpuidle_register(struct cpuidle_driver *drv); extern int cpuidle_register_driver(struct cpuidle_driver *drv); struct cpuidle_driver *cpuidle_get_driver(void); extern void cpuidle_unregister_driver(struct cpuidle_driver *drv); @@ -154,6 +155,8 @@ extern int cpuidle_play_dead(void); #else static inline void disable_cpuidle(void) { } static inline int cpuidle_idle_call(void) { return -ENODEV; } +static inline int cpuidle_register(struct cpuidle_driver *drv) +{return -ENODEV; } static inline int cpuidle_register_driver(struct cpuidle_driver *drv) {return -ENODEV; } static inline struct cpuidle_driver *cpuidle_get_driver(void) {return NULL; } -- 1.7.5.4

12 years, 1 month

Building Linaro Android from source and replacing the kernel in an Linaro Android build

by Zach Pfeffer

I get these questions a lot so I wrote some blog posts with the exact steps I used. http://www.linaro.org/linaro-blog/2011/09/15/switching-out-a-pre-built-andr… http://www.linaro.org/linaro-blog/2011/09/15/%EF%BB%BFbuilding-a-linaro-and… Enjoy! -- Zach Pfeffer Android Platform Team Lead, Linaro Platform Teams Linaro.org | Open source software for ARM SoCs Follow Linaro: http://www.facebook.com/pages/Linaro http://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog

12 years, 1 month

[PATCH v2] EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc

by Chander Kashyap

TZPC IP is common across Exynos based SoC'c. Renaming exynos5_tzpc in arch/arm/include/asm/arch-exynos/tzpc.h to exynos_tzpc will allow generic usase of tzpc. Also modify board/samsung/smdk5250/tzpc_init.c to use exynos_tzpc. Signed-off-by: Chander Kashyap <chander.kashyap(a)linaro.org> --- Changes in V2: - Renaming is changed from s5p_ctzpc to exynos_tzpc as per Kyungmin's Comments. arch/arm/include/asm/arch-exynos/tzpc.h | 2 +- board/samsung/smdk5250/tzpc_init.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/tzpc.h b/arch/arm/include/asm/arch-exynos/tzpc.h index 2c9a07b..c5eb4b1 100644 --- a/arch/arm/include/asm/arch-exynos/tzpc.h +++ b/arch/arm/include/asm/arch-exynos/tzpc.h @@ -22,7 +22,7 @@ #define __TZPC_H_ #ifndef __ASSEMBLY__ -struct exynos5_tzpc { +struct exynos_tzpc { unsigned int r0size; char res1[0x7FC]; unsigned int decprot0stat; diff --git a/board/samsung/smdk5250/tzpc_init.c b/board/samsung/smdk5250/tzpc_init.c index c2ccef3..f39bd55 100644 --- a/board/samsung/smdk5250/tzpc_init.c +++ b/board/samsung/smdk5250/tzpc_init.c @@ -28,7 +28,7 @@ /* Setting TZPC[TrustZone Protection Controller] */ void tzpc_init(void) { - struct exynos5_tzpc *tzpc; + struct exynos_tzpc *tzpc; unsigned int addr; for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { -- 1.7.5.4

12 years, 1 month

[PATCH v2] ARM: dts: imx6q: add anatop regulators

by Ying-Chun Liu (PaulLiu)

From: "Ying-Chun Liu (PaulLiu)" <paul.liu(a)linaro.org> Add anatop regulators to imx6q.dtsi for all imx6q platforms. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu(a)linaro.org> Signed-off-by: Richard Zhao <richard.zhao(a)linaro.org> Cc: Shawn Guo <shawn.guo(a)linaro.org> --- arch/arm/boot/dts/imx6q.dtsi | 86 ++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 86 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 263e8f3..79f59e7 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -346,6 +346,92 @@ compatible = "fsl,imx6q-anatop"; reg = <0x020c8000 0x1000>; interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; + #address-cells = <1>; + #size-cells = <0>; + + regulator-1p1@110 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd1p1"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1375000>; + regulator-always-on; + anatop-reg-offset = <0x110>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <4>; + anatop-min-voltage = <800000>; + anatop-max-voltage = <1375000>; + }; + + regulator-3p0@120 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd3p0"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <3150000>; + regulator-always-on; + anatop-reg-offset = <0x120>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2625000>; + anatop-max-voltage = <3400000>; + }; + + regulator-2p5@130 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vdd2p5"; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2750000>; + regulator-always-on; + anatop-reg-offset = <0x130>; + anatop-vol-bit-shift = <8>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <0>; + anatop-min-voltage = <2000000>; + anatop-max-voltage = <2750000>; + }; + + regulator-vddcore@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "cpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <0>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + regulator-vddpu@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddpu"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <9>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; + + regulator-vddsoc@140 { + compatible = "fsl,anatop-regulator"; + regulator-name = "vddsoc"; + regulator-min-microvolt = <725000>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + anatop-reg-offset = <0x140>; + anatop-vol-bit-shift = <18>; + anatop-vol-bit-width = <5>; + anatop-min-bit-val = <1>; + anatop-min-voltage = <725000>; + anatop-max-voltage = <1450000>; + }; }; usbphy@020c9000 { /* USBPHY1 */ -- 1.7.9.1

12 years, 1 month

[PATCH 0/2] change lpj in arm smp common code

by Richard Zhao

The two patches were originally in [PATCH V6 0/7] add a generic cpufreq driver. I seperated them and hope they can go to upstream earlier. Richard Zhao (2): ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp cpufreq: OMAP: remove loops_per_jiffy recalculate for smp arch/arm/kernel/smp.c | 54 ++++++++++++++++++++++++++++++++++++++++ drivers/cpufreq/omap-cpufreq.c | 36 -------------------------- 2 files changed, 54 insertions(+), 36 deletions(-) -- 1.7.5.4

12 years, 1 month

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linaro-dev April 2012