"Will Deacon" <will.deacon(a)arm.com> wrote on 02/21/2011 06:56:13 PM:
> > > - On (some versions of?) Versatile Express SMP Cortex-A9 SMP boards,
a CPU
> > > errata (#720789) causes TLB flushes to sometime fail, which can lead
to
> > > random problems when running GDB in SMP mode (and probably
elsewhere).
> > > There is a kernel work-around for this problem activated by
> > > CONFIG_ARM_ERRATA_720789, but this is unfortuantely not active on the
> > > Linaro kernels. (On OMAP4, this happens automatically due to an
entry in
> > > mach-omap2/Kconfig. There is no such entry in mach-vexpress/Kconfig
> > > currently.)
> >
> > Could you send a patch to Russell for that?
>
> I have a patch that enables some other workarounds that we probably
> want enabled for the VE as well.
Great, thanks!
> I can CC you (Ulrich) on that if you'd prefer?
Sure, that's fine with me ...
Mit freundlichen Gruessen / Best Regards
Ulrich Weigand
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STSM, GNU compiler and toolchain for Linux on System z and Cell/B.E.
IBM Deutschland Research & Development GmbH
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Hi there,
When I am trying to use ftrace to measure cpuidle latency, I find that the
timestamp is always ending with 0000, like below.
bash-2.05b# head trace
# tracer: nop
#
# TASK-PID CPU# TIMESTAMP FUNCTION
# | | | | |
<idle>-0 [000] 79.530000: cpu_idle: state=0 cpu_id=0
<idle>-0 [000] 79.530000: cpu_idle: state=4294967295
cpu_id=0
<idle>-0 [000] 79.530000: cpu_idle: state=0 cpu_id=0
<idle>-0 [000] 79.530000: cpu_idle: state=4294967295
cpu_id=0
<idle>-0 [000] 79.530000: cpu_idle: state=0 cpu_id=0
<idle>-0 [000] 79.530000: cpu_idle: state=4294967295
cpu_id=0
But it is supposed to be more accurate like:
<idle>-0 [000] 270.396210: cpu_idle: state=4294967295 cpu_id=0
<idle>-0 [000] 270.422424: cpu_idle: state=0 cpu_id=0
<idle>-0 [000] 270.427124: cpu_idle: state=4294967295 cpu_id=0
<idle>-0 [000] 270.427185: cpu_idle: state=2 cpu_id=0
Did I miss something in kernel configuration or some certain features?
Thanks
Yong
Hi,
The ondemand delay value is calculated before calling dbs_check_cpu
which can lead to a delay value of sampling_rate*sampling_down_factor
but a frequency set to the lowest value. The main result is a slow
responsiveness during this period. This patch moves the calculation of
delay after the call of dbs_check_cpu. I have seen this problem when
testing cpufreq-bench on my Arm platform.
Vincent
On 7 February 2011 17:14, Vincent Guittot <vincent.guittot(a)linaro.org> wrote:
> calculate ondemand delay after dbs_check_cpu call because it can
> modify rate_mult value
>
> use freq_lo_jiffies value for the sub sample period of powersave_bias mode
>
> Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org>
> ---
> drivers/cpufreq/cpufreq_ondemand.c | 20 +++++++++++++-------
> 1 files changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/cpufreq/cpufreq_ondemand.c
> b/drivers/cpufreq/cpufreq_ondemand.c
> index 58aa85e..44c2dba 100644
> --- a/drivers/cpufreq/cpufreq_ondemand.c
> +++ b/drivers/cpufreq/cpufreq_ondemand.c
> @@ -641,13 +641,7 @@ static void do_dbs_timer(struct work_struct *work)
> container_of(work, struct cpu_dbs_info_s, work.work);
> unsigned int cpu = dbs_info->cpu;
> int sample_type = dbs_info->sample_type;
> -
> - /* We want all CPUs to do sampling nearly on same jiffy */
> - int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate
> - * dbs_info->rate_mult);
> -
> - if (num_online_cpus() > 1)
> - delay -= jiffies % delay;
> + int delay;
>
> mutex_lock(&dbs_info->timer_mutex);
>
> @@ -660,10 +654,22 @@ static void do_dbs_timer(struct work_struct *work)
> /* Setup timer for SUB_SAMPLE */
> dbs_info->sample_type = DBS_SUB_SAMPLE;
> delay = dbs_info->freq_hi_jiffies;
> + } else {
> + /* We want all CPUs to do sampling nearly on
> + * same jiffy
> + */
> + delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate
> + * dbs_info->rate_mult);
> +
> + if (num_online_cpus() > 1)
> + delay -= jiffies % delay;
> +
> }
> +
> } else {
> __cpufreq_driver_target(dbs_info->cur_policy,
> dbs_info->freq_lo, CPUFREQ_RELATION_H);
> + delay = dbs_info->freq_lo_jiffies;
> }
> schedule_delayed_work_on(cpu, &dbs_info->work, delay);
> mutex_unlock(&dbs_info->timer_mutex);
> --
> 1.7.1
>
2011/2/21 Jason Kridner <jkridner(a)beagleboard.org>:
> How about putting it inside the [PATCH xxx], ie. "[PATCH v3 android]
> device/linaro/beagleboard: Install 0xbench native applications"? When
> I go to git.linaro.org, this would give me enough information to
> figure out to which tree this patch applied. For that matter, isn't
> "device/linaro/beagleboard" redundant as a comment within that tree?
> Why not just do "[PATCH v3 android/device/linaro/beagleboard] Install
> 0xbench native applications"?
hi Jason,
I completely agree with you. Also, your idea matches the layout of
git.linaro.org .
Thanks a lot!
-jserv
Hi,
Along with Feature Freeze [1], Thursday sees Linaro's Board Support Review
deadline. This deadline marks the start of the process to define exactly
what hardware will be enabled in the final Linaro Evaluation Builds
released at the end of the cycle [2]. This review is to ensure that the
target hardware support is progressing as expected and that the final
user experience will shine on these boards.
For more information on the Board Support Review deadline please see the
Linaro wiki at:
https://wiki.linaro.org/Process/Cycle/BoardReview
There will be another review on 2011-03-24 where the list will be
refined if necessary.
A list of boards that Linaro expects to enable this cycle will be
circulated after the review.
Regards,
Jamie.
--
Linaro Release Manager | Platform Project Manager
Office: +44 1761 348 220 | Mobile: +44 7962 259 437
[1] http://lists.linaro.org/pipermail/linaro-dev/2011-February/002702.html
[2] https://wiki.linaro.org/Releases/1105
Hi,
Dave told me he got 3 u8500 boards but no UART break out board. From
what I have heard the u8500 boards for Linaro should come with a full
kit including power supply and UART.
If you have a u8500 board please let me know if it contains a UART
break out board or whether it is missing.
Thanks,
Per
Hi,
Thursday 24th February is Feature Freeze. This is a point in the
Engineering Cycle [1] where we stop taking new features and concentrate
on fixing bugs. Please get your new features (as defined by new
packages, API changes, additional features) proposed and uploaded to the
archive as soon as possible. If you know of any features that will not
make the deadline please make the Release Manager (me) aware of these
and be prepared for the Feature Freeze Exception Process, an explanation
of which can be found at:
https://wiki.linaro.org/Process/Cycle/FreezeExceptionProcess
To read more about the Feature Freeze deadline head on over to:
https://wiki.linaro.org/Process/Cycle/FeatureFreeze
Regards,
Jamie.
--
Linaro Release Manager
[1] https://wiki.linaro.org/Releases/1105/Schedule