On Mon, Nov 28, 2011 at 12:18 AM, Mans Rullgard mans.rullgard@linaro.org wrote:
On 27 November 2011 21:30, Siarhei Siamashka siarhei.siamashka@gmail.com wrote:
On Sun, Nov 27, 2011 at 8:18 PM, Woodruff, Richard r-woodruff2@ti.com wrote:
From: linaro-dev-bounces@lists.linaro.org [mailto:linaro-dev- bounces@lists.linaro.org] On Behalf Of Mans Rullgard
Do you have an erratum number for this?
This was very recent BUG and not yet made it to the public errata numbers. Most likely next PL310 errata update should have this one documented.
Do you have _any_ identifier for it?
ARM expanded errata 752271 to cover DLF not working till r3p2 in errata version 13.1 (21 Nov 11), 4460 is r3p1-50rel0 and is impacted.
Thanks a lot. Your posts are very informative as usual.
By the way, do you know whether it is safe to use "SCU Speculative linefills" with Cortex-A9 r2pX and PL310 r3pX? http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/BABEBFBH.html
As a quick and dirty test, it can be enabled in 'arch/arm/kernel/smp_scu.c' by just setting extra (1 << 3) bit in SCU Control Register from 'scu_enable' function.
The SCU is already enabled when that function runs (don't know what enables it), so you'll need to remove the early return to make any changes.
Do you mean SCU is enabled and has "SCU Speculative linefills enable" bit already set on OMAP4460? Or just SCU is enabled without speculative linefills?
In my case (origenboard), 'scu_enable' function seems to be called just once and the value in SCU Control Register is originally 0x00000000. So SCU gets enabled without speculative linefills when using the current linaro u-boot and kernel. And I thought that speculative linefills might be not enabled on purpose. But I guess this is actually a question for Samsung folks.
I'm not aware of any errata affecting this feature on 4460, nor have I seen any bad behaviour while running with it enabled, and I do get a slight performance increase in Libav benchmarks.
Thanks, that's good to know.