Re-sending on top of Tero's changes which are already
in -next and the one which adds support for twl6030
vdd1/2/3 SMPS [1].
v3 has mainly 2 differences from v2
-1- TWL driver now uses just one table for both dt and
non-dt based lookup for driver data.
-2- All common regulator nodes for twl4030 and twl6030 are
now defined in the twl4030.dtsi and twl6030.dtsi instead of
repeating the nodes in all board files, which also means
the patch ('arm/dts: twl: Pass regulator data from dt')
has a dependency with the series from Benoit which adds the
twl4030.dtsi and twl6030.dtsi files[2].
I have tested the patches on omap4panda and omap3beagle boards.
[1] http://marc.info/?l=linux-omap&m=133009693905864&w=2
[2] git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git
for_3.4/dt_i2c_twl
Rajendra Nayak (2):
regulator: twl: adapt twl-regulator driver to dt
arm/dts: twl: Pass regulator data from dt
.../bindings/regulator/twl-regulator.txt | 66 +++++
arch/arm/boot/dts/omap3-beagle.dts | 6 +
arch/arm/boot/dts/twl4030.dtsi | 18 ++
arch/arm/boot/dts/twl6030.dtsi | 60 +++++
drivers/regulator/twl-regulator.c | 259 +++++++++++++-------
5 files changed, 322 insertions(+), 87 deletions(-)
create mode 100644 Documentation/devicetree/bindings/regulator/twl-regulator.txt
Hello Booher,
I was previously using Angstrom Gnome OS given for Gumstix by Sakoman, this
turned upto be a nightmare, just as you have told, with adhoc WiFi. I gave
up.. I started with Linaro (Ubuntu for embedded systems by Canonical). In
Linaro WiFi and bluetooth both work very well including the AdHoc mode in
WiFi. In Linaro I haven't figured out how to sense ADC pins, which I was
able to do using Angstrom-Gnome. So if you don't require ADC sensing for
the moment, you can start with Linaro.
Regards,
---------------------------------
Sudhangathan BS
Ph:(+91) 9731-905-205
---------------------------------
Generalize CONFIG_IRQ_TIME_ACCOUNTING between X86 and
ARM, move "noirqtime=" option to common debugging code.
For a bit of backward compatibility, X86-specific option
"tsc=noirqtime" is preserved, but issues a warning.
Suggested-by: Yong Zhang <yong.zhang0(a)gmail.com>
Suggested-by: Russell King <rmk+kernel(a)arm.linux.org.uk>
Suggested-by: Ingo Molnar <mingo(a)elte.hu>
Suggested-by: Peter Zijlstra <peterz(a)infradead.org>
Acked-by: Venkatesh Pallipadi <venki(a)google.com>
Signed-off-by: Dmitry Antipov <dmitry.antipov(a)linaro.org>
---
Documentation/kernel-parameters.txt | 9 +++++----
arch/arm/kernel/sched_clock.c | 2 ++
arch/x86/Kconfig | 11 -----------
arch/x86/kernel/tsc.c | 12 ++++++------
include/linux/sched.h | 6 +-----
kernel/sched/core.c | 24 +++++++++++++++++++-----
lib/Kconfig.debug | 12 ++++++++++++
7 files changed, 45 insertions(+), 31 deletions(-)
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 033d4e6..a5da255 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1790,6 +1790,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noirqdebug [X86-32] Disables the code which attempts to detect and
disable unhandled interrupt sources.
+ noirqtime [X86,ARM] Run time disables IRQ_TIME_ACCOUNTING and
+ eliminates the timestamping on irq/softirq entry/exit.
+
no_timer_check [X86,APIC] Disables the code which tests for
broken timer IRQ sources.
@@ -2636,10 +2639,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
as the stability checks done at bootup. Used to enable
high-resolution timer mode on older hardware, and in
virtualized environment.
- [x86] noirqtime: Do not use TSC to do irq accounting.
- Used to run time disable IRQ_TIME_ACCOUNTING on any
- platforms where RDTSC is slow and this accounting
- can add overhead.
+ [x86] noirqtime: obsoleted by "noirqtime" generic option,
+ see it's documentation for details.
turbografx.map[2|3]= [HW,JOY]
TurboGraFX parallel port interface
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 5416c7c..30b5f89 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -144,6 +144,8 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
*/
cd.epoch_ns = 0;
+ enable_sched_clock_irqtime();
+
pr_debug("Registered %pF as sched_clock source\n", read);
}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5bed94e..4759676 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -805,17 +805,6 @@ config SCHED_MC
making when dealing with multi-core CPU chips at a cost of slightly
increased overhead in some places. If unsure say N here.
-config IRQ_TIME_ACCOUNTING
- bool "Fine granularity task level IRQ time accounting"
- default n
- ---help---
- Select this option to enable fine granularity task irq time
- accounting. This is done by reading a timestamp on each
- transitions between softirq and hardirq state, so there can be a
- small performance impact.
-
- If in doubt, say N here.
-
source "kernel/Kconfig.preempt"
config X86_UP_APIC
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index a62c201..f1b2b63 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -103,14 +103,15 @@ int __init notsc_setup(char *str)
__setup("notsc", notsc_setup);
-static int no_sched_irq_time;
-
static int __init tsc_setup(char *str)
{
if (!strcmp(str, "reliable"))
tsc_clocksource_reliable = 1;
- if (!strncmp(str, "noirqtime", 9))
- no_sched_irq_time = 1;
+ if (!strncmp(str, "noirqtime", 9)) {
+ printk(KERN_WARNING "tsc: tsc=noirqtime is "
+ "obsolete, use noirqtime instead\n");
+ disable_sched_clock_irqtime();
+ }
return 1;
}
@@ -978,8 +979,7 @@ void __init tsc_init(void)
/* now allow native_sched_clock() to use rdtsc */
tsc_disabled = 0;
- if (!no_sched_irq_time)
- enable_sched_clock_irqtime();
+ enable_sched_clock_irqtime();
lpj = ((u64)tsc_khz * 1000);
do_div(lpj, HZ);
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 7d379a6..ea4019c 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1961,11 +1961,7 @@ extern void sched_clock_idle_wakeup_event(u64 delta_ns);
#endif
#ifdef CONFIG_IRQ_TIME_ACCOUNTING
-/*
- * An i/f to runtime opt-in for irq time accounting based off of sched_clock.
- * The reason for this explicit opt-in is not to have perf penalty with
- * slow sched_clocks.
- */
+extern int sched_clock_irqtime;
extern void enable_sched_clock_irqtime(void);
extern void disable_sched_clock_irqtime(void);
#else
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index b342f57..4693509 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -757,11 +757,17 @@ static DEFINE_PER_CPU(u64, cpu_hardirq_time);
static DEFINE_PER_CPU(u64, cpu_softirq_time);
static DEFINE_PER_CPU(u64, irq_start_time);
-static int sched_clock_irqtime;
+
+/*
+ * -1 if not initialized, 0 if disabled with "noirqtime" kernel option
+ * or after unstable clock was detected, 1 if enabled and active.
+ */
+__read_mostly int sched_clock_irqtime = -1;
void enable_sched_clock_irqtime(void)
{
- sched_clock_irqtime = 1;
+ if (sched_clock_irqtime == -1)
+ sched_clock_irqtime = 1;
}
void disable_sched_clock_irqtime(void)
@@ -769,6 +775,14 @@ void disable_sched_clock_irqtime(void)
sched_clock_irqtime = 0;
}
+static int __init irqtime_setup(char *str)
+{
+ sched_clock_irqtime = 0;
+ return 1;
+}
+
+__setup("noirqtime", irqtime_setup);
+
#ifndef CONFIG_64BIT
static DEFINE_PER_CPU(seqcount_t, irq_time_seq);
@@ -822,7 +836,7 @@ void account_system_vtime(struct task_struct *curr)
s64 delta;
int cpu;
- if (!sched_clock_irqtime)
+ if (sched_clock_irqtime < 1)
return;
local_irq_save(flags);
@@ -2852,7 +2866,7 @@ void account_process_tick(struct task_struct *p, int user_tick)
cputime_t one_jiffy_scaled = cputime_to_scaled(cputime_one_jiffy);
struct rq *rq = this_rq();
- if (sched_clock_irqtime) {
+ if (sched_clock_irqtime > 0) {
irqtime_account_process_tick(p, user_tick, rq);
return;
}
@@ -2886,7 +2900,7 @@ void account_steal_ticks(unsigned long ticks)
void account_idle_ticks(unsigned long ticks)
{
- if (sched_clock_irqtime) {
+ if (sched_clock_irqtime > 0) {
irqtime_account_idle_ticks(ticks);
return;
}
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 8745ac7..236e814 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -299,6 +299,18 @@ config SCHEDSTATS
application, you can say N to avoid the very slight overhead
this adds.
+config IRQ_TIME_ACCOUNTING
+ bool "Fine granularity task level IRQ time accounting"
+ depends on X86 || ARM
+ default n
+ ---help---
+ Select this option to enable fine granularity task irq time
+ accounting. This is done by reading a timestamp on each
+ transitions between softirq and hardirq state, so there can be a
+ small performance impact.
+
+ If in doubt, say N here.
+
config TIMER_STATS
bool "Collect kernel timers statistics"
depends on DEBUG_KERNEL && PROC_FS
--
1.7.7.6
Generalize CONFIG_IRQ_TIME_ACCOUNTING between X86 and
ARM, move "noirqtime=" option to common debugging code.
For a bit of backward compatibility, X86-specific option
"tsc=noirqtime" is preserved, but issues a warning.
Suggested-by: Yong Zhang <yong.zhang0(a)gmail.com>
Suggested-by: Russell King <rmk+kernel(a)arm.linux.org.uk>
Suggested-by: Ingo Molnar <mingo(a)elte.hu>
Acked-by: Venkatesh Pallipadi <venki(a)google.com>
Signed-off-by: Dmitry Antipov <dmitry.antipov(a)linaro.org>
---
Documentation/kernel-parameters.txt | 9 +++++----
arch/arm/kernel/sched_clock.c | 2 ++
arch/x86/Kconfig | 11 -----------
arch/x86/kernel/tsc.c | 12 ++++++------
include/linux/sched.h | 17 ++++++++++-------
kernel/sched/core.c | 21 ++++++++++++---------
lib/Kconfig.debug | 12 ++++++++++++
7 files changed, 47 insertions(+), 37 deletions(-)
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 033d4e6..a5da255 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -1790,6 +1790,9 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noirqdebug [X86-32] Disables the code which attempts to detect and
disable unhandled interrupt sources.
+ noirqtime [X86,ARM] Run time disables IRQ_TIME_ACCOUNTING and
+ eliminates the timestamping on irq/softirq entry/exit.
+
no_timer_check [X86,APIC] Disables the code which tests for
broken timer IRQ sources.
@@ -2636,10 +2639,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
as the stability checks done at bootup. Used to enable
high-resolution timer mode on older hardware, and in
virtualized environment.
- [x86] noirqtime: Do not use TSC to do irq accounting.
- Used to run time disable IRQ_TIME_ACCOUNTING on any
- platforms where RDTSC is slow and this accounting
- can add overhead.
+ [x86] noirqtime: obsoleted by "noirqtime" generic option,
+ see it's documentation for details.
turbografx.map[2|3]= [HW,JOY]
TurboGraFX parallel port interface
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 5416c7c..30b5f89 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -144,6 +144,8 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
*/
cd.epoch_ns = 0;
+ enable_sched_clock_irqtime();
+
pr_debug("Registered %pF as sched_clock source\n", read);
}
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5bed94e..4759676 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -805,17 +805,6 @@ config SCHED_MC
making when dealing with multi-core CPU chips at a cost of slightly
increased overhead in some places. If unsure say N here.
-config IRQ_TIME_ACCOUNTING
- bool "Fine granularity task level IRQ time accounting"
- default n
- ---help---
- Select this option to enable fine granularity task irq time
- accounting. This is done by reading a timestamp on each
- transitions between softirq and hardirq state, so there can be a
- small performance impact.
-
- If in doubt, say N here.
-
source "kernel/Kconfig.preempt"
config X86_UP_APIC
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index a62c201..f1b2b63 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -103,14 +103,15 @@ int __init notsc_setup(char *str)
__setup("notsc", notsc_setup);
-static int no_sched_irq_time;
-
static int __init tsc_setup(char *str)
{
if (!strcmp(str, "reliable"))
tsc_clocksource_reliable = 1;
- if (!strncmp(str, "noirqtime", 9))
- no_sched_irq_time = 1;
+ if (!strncmp(str, "noirqtime", 9)) {
+ printk(KERN_WARNING "tsc: tsc=noirqtime is "
+ "obsolete, use noirqtime instead\n");
+ disable_sched_clock_irqtime();
+ }
return 1;
}
@@ -978,8 +979,7 @@ void __init tsc_init(void)
/* now allow native_sched_clock() to use rdtsc */
tsc_disabled = 0;
- if (!no_sched_irq_time)
- enable_sched_clock_irqtime();
+ enable_sched_clock_irqtime();
lpj = ((u64)tsc_khz * 1000);
do_div(lpj, HZ);
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 7d379a6..9b13f79 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1961,13 +1961,16 @@ extern void sched_clock_idle_wakeup_event(u64 delta_ns);
#endif
#ifdef CONFIG_IRQ_TIME_ACCOUNTING
-/*
- * An i/f to runtime opt-in for irq time accounting based off of sched_clock.
- * The reason for this explicit opt-in is not to have perf penalty with
- * slow sched_clocks.
- */
-extern void enable_sched_clock_irqtime(void);
-extern void disable_sched_clock_irqtime(void);
+extern int sched_clock_irqtime;
+static inline void enable_sched_clock_irqtime(void)
+{
+ if (sched_clock_irqtime == -1)
+ sched_clock_irqtime = 1;
+}
+static inline void disable_sched_clock_irqtime(void)
+{
+ sched_clock_irqtime = 0;
+}
#else
static inline void enable_sched_clock_irqtime(void) {}
static inline void disable_sched_clock_irqtime(void) {}
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 5255c9d..4e7a197 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -757,18 +757,21 @@ static DEFINE_PER_CPU(u64, cpu_hardirq_time);
static DEFINE_PER_CPU(u64, cpu_softirq_time);
static DEFINE_PER_CPU(u64, irq_start_time);
-static int sched_clock_irqtime;
-void enable_sched_clock_irqtime(void)
-{
- sched_clock_irqtime = 1;
-}
+/*
+ * -1 if not initialized, 0 if disabled with "noirqtime" kernel option
+ * or after unstable clock was detected, 1 if enabled and active.
+ */
+__read_mostly int sched_clock_irqtime = -1;
-void disable_sched_clock_irqtime(void)
+static int __init irqtime_setup(char *str)
{
sched_clock_irqtime = 0;
+ return 1;
}
+__setup("noirqtime", irqtime_setup);
+
#ifndef CONFIG_64BIT
static DEFINE_PER_CPU(seqcount_t, irq_time_seq);
@@ -822,7 +825,7 @@ void account_system_vtime(struct task_struct *curr)
s64 delta;
int cpu;
- if (!sched_clock_irqtime)
+ if (sched_clock_irqtime < 1)
return;
local_irq_save(flags);
@@ -2853,7 +2856,7 @@ void account_process_tick(struct task_struct *p, int user_tick)
cputime_t one_jiffy_scaled = cputime_to_scaled(cputime_one_jiffy);
struct rq *rq = this_rq();
- if (sched_clock_irqtime) {
+ if (sched_clock_irqtime > 0) {
irqtime_account_process_tick(p, user_tick, rq);
return;
}
@@ -2887,7 +2890,7 @@ void account_steal_ticks(unsigned long ticks)
void account_idle_ticks(unsigned long ticks)
{
- if (sched_clock_irqtime) {
+ if (sched_clock_irqtime > 0) {
irqtime_account_idle_ticks(ticks);
return;
}
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug
index 8745ac7..236e814 100644
--- a/lib/Kconfig.debug
+++ b/lib/Kconfig.debug
@@ -299,6 +299,18 @@ config SCHEDSTATS
application, you can say N to avoid the very slight overhead
this adds.
+config IRQ_TIME_ACCOUNTING
+ bool "Fine granularity task level IRQ time accounting"
+ depends on X86 || ARM
+ default n
+ ---help---
+ Select this option to enable fine granularity task irq time
+ accounting. This is done by reading a timestamp on each
+ transitions between softirq and hardirq state, so there can be a
+ small performance impact.
+
+ If in doubt, say N here.
+
config TIMER_STATS
bool "Collect kernel timers statistics"
depends on DEBUG_KERNEL && PROC_FS
--
1.7.7.6
Hi, guys:
As I know linaro is working on a unified memory manager for soc world like
a similar one already exists in PC world (gem/ttm).
But I'm curious about how this manager handle the different sync notify
between various different IP vendor?
As we know, on PC the vsp+capture+graphic+display always done by one
unit--the GPU, if a piece of hardware memory buffer wanted to be
zero-copied between vsp/graphic/display there must be some sync/notify
mechanism otherwise the race condition will occur. On gpu always an
interrupt driven object fence can handle it. But in soc, there is no
integrated vsp/graphic/display, they all may come from various independent
ip vendor, so there may no unified interrupt source can be collected by
memory manager to know whether one buffer hasn't be completed by the
previous engine and the next engine should block wait but without cpu
blocked too. Thanks
Regards
Hi; I'm hoping somebody will be willing to run a test kernel
for me on some omap boards and send me the dmesg output.
(I'm trying to sort out QEMU's modelling of the OMAP ID
registers and the TRMs are rather unhelpful; in particular
the OMAP35x TRM claims that there are two overlapping registers
at addresses 0x218-0x21c!)
I've done a Beagle xM which is an OMAP3630, but I'm looking for
the results for OMAP34xx/35xx (I think classic Beagle is this)
and also if possible an OMAP2 board.
The kernel is http://people.linaro.org/~pmaydell/uImage.test
(it's the linaro 3.0 kernel with a stock omap2_defconfig and
some extra printks so it shouldn't do anything too alarming
to your board :-)). It needs the command line arguments
'earlyprintk debug console=ttyO2,115200'
(possibly for omap2 the console tty device is different)
and I'm interested in the bit of dmesg output near the start:
[ 0.000000] PMM: ID register dump:
[ 0.000000] register offset 0x204 value 0x0b89102f
[ 0.000000] register offset 0x208 value 0x00000000
[ 0.000000] register offset 0x20c value 0x00000000
[ 0.000000] register offset 0x210 value 0x000000f0
[ 0.000000] register offset 0x214 value 0xcafeb891
[ 0.000000] register offset 0x218 value 0x0703201f
[ 0.000000] register offset 0x21c value 0x015739ea
[ 0.000000] register offset 0x220 value 0x1bf00000
[ 0.000000] register offset 0x224 value 0x5dd40000
[ 0.000000] OMAP3630 ES1.0 (l2cache iva sgx neon isp 192mhz_clk )
(so you don't need the initrd/modules/etc, it's ok if it
doesn't boot fully.)
Thanks in advance!
-- PMM
Hello,
One of the issues with https://android-build.linaro.org/ is that, if
build fails, it's not easy to tell if it happened because of
compilation error ("real" failure) or due to non-deterministic error
with setting up infrastructure for build (e.g. during source checkout).
The latter not so uncommon due to vast source size of Android and
complexity of cloud infrastructure.
This became especially problematic with start of automated CI loop,
where it leads to false negatives when doing pre-merge testing.
Improving this situation was subject of few blueprints in which
Infrastructure team worked, and recently, a solution was deployed. With
it, if a build fails due to non-deterministic infrastructure error, it
will get status of "NOT BUILT", meaning that a build never actually got
to compilation phase. Suggested action in such case is to retry.
Please note that Jenkins there is some inconsistency within the Jenkins
itself regarding NOT BUILT status - "Pending" is used as a display name
in places, and the same gray icon used as for ABORTED builds. So,
please keep that in mind, or yet better use Build Frontend.
Unfortunately, even short weekend testing showed that error separation
achieved is not ideal (folks who participated in Connect Q4.11
session dedicated to this, may remember that I said that it would
take adding AI to do that properly ;-) ).
In particular, if there was an issue with manifest file (essentially,
an error in Android source code), it will be reported as NOT BUILT
instead of FAILED. Here's example of such build:
https://android-build.linaro.org/jenkins/job/linaro-android_panda-ics-gcc44…
Opposite miscategorization may also happen: very early infra error may
be reported as FAILED instead of NOT BUILT. Example:
https://android-build.linaro.org/jenkins/job/linaro-android_panda-ics-gcc46…
So, Infrastructure team will continue to work on improving reliability
of builds, but in the meantime please keep looking in the build logs for
actual cause of the failure (feel free to report unexpected build
status to https://bugs.launchpad.net/linaro-android-infrastructure)
--
Best Regards,
Paul
Linaro.org | Open source software for ARM SoCs
Follow Linaro: http://www.facebook.com/pages/Linarohttp://twitter.com/#!/linaroorg - http://www.linaro.org/linaro-blog
The following patch checks if there are pending interrupts on the gic.
This function is needed for example for the ux500 cpuidle driver.
When the A9 cores and the gic are decoupled from the PRCMU, the idle
routine has to check if an interrupt is pending on the gic before entering
in retention mode.
Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org>
---
arch/arm/common/gic.c | 37 +++++++++++++++++++++++++++++++++++
arch/arm/include/asm/hardware/gic.h | 2 +-
2 files changed, 38 insertions(+), 1 deletions(-)
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index aa52699..2528094 100644
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -750,6 +750,43 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
}
#endif
+/*
+ * gic_pending_irq - checks if there are pending interrupts on the gic
+ *
+ * Disabling an interrupt only disables the forwarding of the
+ * interrupt to any CPU interface. It does not prevent the interrupt
+ * from changing state, for example becoming pending, or active and
+ * pending if it is already active. For this reason, we have to check
+ * the interrupt is pending *and* is enabled.
+ *
+ * Returns true if there are pending and enabled interrupts, false
+ * otherwise.
+ */
+bool gic_pending_irq(unsigned int gic_nr)
+{
+ u32 pr; /* Pending register */
+ u32 er; /* Enable register */
+ void __iomem *dist_base;
+ int gic_irqs;
+ int i;
+
+ BUG_ON(gic_nr >= MAX_GIC_NR);
+
+ gic_irqs = gic_data[gic_nr].gic_irqs;
+ dist_base = gic_data_dist_base(&gic_data[gic_nr]);
+
+ for (i = 0; i < DIV_ROUND_UP(gic_irqs, 32); i++) {
+
+ pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
+ er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
+
+ if (pr & er)
+ return true;
+ }
+
+ return false;
+}
+
#ifdef CONFIG_OF
static int gic_cnt __initdata = 0;
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index 4b1ce6c..d198ac0 100644
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -45,7 +45,7 @@ void gic_secondary_init(unsigned int);
void gic_handle_irq(struct pt_regs *regs);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
-
+bool gic_pending_irq(unsigned int gic_nr);
static inline void gic_init(unsigned int nr, int start,
void __iomem *dist , void __iomem *cpu)
{
--
1.7.5.4